Acer AL1751 AL1751 Service Guide - Page 44

Schematic Diagram Chapter 6 TSU56AK B1 TXD RXD DDC_CLK DDC_DAT DDC_WP ST_DET1 ST_DET2 RIN GNDR GIN GNDG SOG BIN GNDB HSYNC VSYNC B2 RIN GNDR GIN GNDG SOG BIN GNDB HSYNC VSYNC VCPU VCPU VCC12V_AUDIO VCC3.3 VCC1.8 VAA1 VAA2 VAA3 VAA4 R+ RG+ GB+ BCLK+ CLK- 3.INPUT B3 ST_DET2 ST_DET1 DDC_WP DDC_CLK DDC_DAT RXD TXD CSZ SCL SDA HWRESET INT AD0 AD1 AD2 AD3 VCPU onPANEL_5V/3.3V onBACKLITE AUDIO_SD AUDIO_MU 6.MCU B6 VCC12V_AUDIO VCC12V_AUDIO AUDIO_MU AUDIO_SD 7.AUDIO B4 VOLUME onBACKLITE onPanel_5V/3.3V VCPU VCC12V_AUDIO VCC3.3 VCC1.8 AdjBACKLITE VAA1 VAA2 VAA3 VAA4 VLCD 2.POWER R+ RG+ GB+ BCLK+ CLK- CSZ SCL SDA HWRESET INT AD0 AD1 AD2 AD3 Volume AdjBACKLITE VLCD 4.SCALER SCHEMATIC VCC1.8 VCC3.3 VAA1 VAA2 VAA3 VAA4 VCC1.8 VCC3.3 VAA1 VAA2 VAA3 VAA4 PA[0..9] PB[0..9] PA[0..9] PB[0..9] B5 PA[0..9] PB[0..9] VLCD VLCD 5.PANEL INTERFACE Title Size B Date: TSU56AK FOR ACER Document Number TOP Wednesday, January 19, 2005 Sheet 2 Rev D of 8 44