Acer Aspire 5755 Aspire 5755, 5755G Service Guide - Page 168

Table 4-3. SEC Phase POST Code Table (Continued) Functionality Name (Include\PostCode.h) Phase Post Code Description SEC_FORCE_MAX_RATIO* SEC 08 Tune CPU frequency ratio to maximum level SEC_GO_TO_SECSTARTUP SEC 09 Setup BIOS ROM cache SEC_GO_TO_PEICORE SEC 0A Enter Boot Firmware Volume * 3rd party relate functions - Platform dependence. Table 4-4. PEI Phase POST Code Table Functionality Name (Include\PostCode.h) PEI_SIO_INIT Phase Post Code Description PEI 70 Super I/O Initialization PEI_CPU_REG_INIT PEI 71 CPU Early Initialization PEI_CPU_AP_INIT* PEI_CPU_HT_RESET* PEI 72 PEI 73 Multi-processor Early Initial HyperTransport Initialization PEI_PCIE_MMIO_INIT PEI 74 PCIE MMIO BAR Initialization PEI_NB_REG_INIT PEI_SB_REG_INIT PEI 75 PEI 76 North Bridge Early Initialization South Bridge Early Initialization PEI_PCIE_TRAINING* PEI 77 PCIE Training PEI_TPM_INIT PEI_SMBUS_INIT PEI 78 PEI 79 TPM Initialization SMBUS Early Initialization PEI_PROGRAM_CLOCK_GEN PEI_IGD_EARLY_INITIAL * PEI_HECI_INIT* PEI 7A PEI 7B PEI 7C Clock Generator Initialization Internal Graphic device early Initialization HECI Initialization PEI_WATCHDOG_INIT* PEI 7D Watchdog timer Initialization PEI_MEMORY_INIT PEI_MEMORY_INIT_FOR_CRISIS PEI 7E PEI 7F Memory Initial for Normal boot. Memory Initial for Crisis Recovery PEI_MEMORY_INSTALL PEI 80 Simple Memory test PEI_TXTPEI* PEI_SWITCH_STACK PEI 81 PEI 82 TXT function early Initialization Start to use Memory PEI_MEMORY_CALLBACK PEI 83 Set cache for physical memory PEI_ENTER_RECOVERY_MODE PEI_RECOVERY_MEDIA_FOUND PEI 84 PEI 85 Recovery device Initialization Found Recovery image 4-26 Troubleshooting