Compaq BL10e Memory technology evolution: an overview of system memory technol
Compaq BL10e - HP ProLiant - 512 MB RAM Manual
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- Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 1
technologies 15 DDR-1 ...15 DDR-2 ...17 DDR-3 ...18 Module naming convention and peak bandwidth 18 Fully-buffered DIMMs ...19 Rambus DRAM ...21 Importance of using HP-certified memory modules in ProLiant servers 23 Conclusion...23 For more information...24 Call to action ...24 - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 2
and backward compatibility, and implements the most promising technologies in ProLiant servers. This paper summarizes the evolution of memory technology and provides an overview of some the newest memory technologies that HP is evaluating for servers and workstations. The purpose is to allay some of - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 3
the memory controller sends electronic address signals that specify the row address and column address of the target cell. The memory controller sends these signals to the DRAM chip by way of the memory bus portion of the address/command bus conveys instructions such as read, write, or refresh. 3 - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 4
When FPM or EDO memory writes data to a particular cell, the memory controller selects the location in which to write the data. The memory controller first selects the page by strobing the Row Address onto the address/command bus. It then selects the exact location by strobing the Column Address - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 5
clock controls all computer components that execute instructions or transfer data. Typically, the system as "0" and "1" in Figure 3) at a specific frequency. The bus frequency is measured in millions of this reason, the components in a typical server are controlled by different clocks that run at - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 6
that control the speed of the memory subsystem are the memory timing and the maximum DRAM speed. The server BIOS sets the memory system speed based on the fastest common frequency of the loaded DIMMs. Burst mode access Data Data Data Data 64b 64b 64b 64b NOTE: NOP = No Operation Instruction 6 - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 7
SDRAM technology FPM and EDO DRAMs are controlled asynchronously, that is, without a memory bus clock. The memory controller determines when to assert signals and when to expect data based on absolute timing. The inefficiencies of transferring data between a synchronous system bus and an - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 8
Registered SDRAM modules To achieve higher memory subsystem capacity, some DIMMs have register logic chips (registers) that act as a pass-through buffer for address and command signals (Figure 6). Registers prevent the memory controller from having to drive the entire arrangement of DRAM chips on - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 9
employ multiple memory buses. If the total number of ranks in the populated DIMM slots exceeds the maximum number of loads the chipset can support, the server may not boot properly or it may not operate reliably. Some systems check the memory configuration while booting to detect invalid memory bus - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 10
cell alters the charge on the capacitor. A soft error does not indicate a problem with a memory device because once the stored data is corrected (for example, the servers. For example, while the HP ProLiant DL585 G2 of 2007 could support a maximum of 128 GB, some of the latest servers now support up - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 11
errors. HP introduced error correction code (ECC) memory in 1993 and continues to implement advanced ECC in all HP ProLiant servers. generating a non-maskable interrupt (NMI) that instructs the system to halt to avoid data corruption servers to support more memory capacity: Operating system support - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 12
As a result, if there is a memory failure, the system must be shut down before the memory can be replaced. The latest generation of HP ProLiant servers offers two levels of Advanced Memory Protection that provide increased fault tolerance for applications requiring higher levels of availability. 12 - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 13
server availability and memory reliability without service intervention or server more information, refer to the associated server user guide. In a system with three support or special software beyond the System BIOS. However, to support messaging and logging at the console along with messages in HP - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 14
A server can remain up and running until it is convenient to take the equipment offline and down for servicing. However server availability is considered the highest priority for enterprise environments. The user configures the system for the desired memory protection mode through the ROM-based Setup - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 15
Advanced memory technologies Despite the performance improvement in the overall system from using SDRAM, the growing performance gap between the memory and processor must be filled by more advanced memory technologies. These technologies, described on the following pages, boost the overall - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 16
of using a 3.3-V operating voltage, DDR-1 uses a 2.5-V signaling specification known as Stub Series-Terminated Logic_2 (SSTL_2). This low-voltage signaling the command bus does not use a strobe and must still meet setup times to a synchronous clock. Thus, at a data rate of 400 Mb/s, the command bus - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 17
-1 DIMMs require 184 pins instead of the 168 pins used by standard SDRAM DIMMs. DDR-1 is versatile enough for use in desktop PCs or servers. To vary the cost of DDR-1 DIMMs for these different markets, memory manufacturers provide unbuffered and registered versions. Unbuffered DDR-1 DIMMs place the - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 18
signals, and clocks) improves signal integrity by reducing the number of stubs and their length. This feature requires the controller to support "write leveling" on DDR-3 DIMMs. 1.5-V signaling reduces power consumption even further than 1.8 V signaling for DDR-2. A thermal sensor integrated on the - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 19
Table 2. Summary of DDR SDRAM technologies Type DDR-1 DDR-2 DDR-3 Component naming convention DDR200 DDR266 DDR333 DDR400 DDR2-400 DDR2-533 DDR2-667 DDR2-800 DDR3-800 DDR3-1066 DDR3-1333 DDR3-1600 Module naming convention PC1600 PC2100 PC2700 PC3200 PC2-3200R PC2-4300 PC2-5300 PC2-6400 PC3-6400 - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 20
that can be supported as the bus speed increases. For example, Figure 16 shows the number of loads supported per channel at servers require improved memory architecture to achieve higher memory bandwidth and capacity. Consequently, JEDEC developed the Fully-Buffered DIMM (FB-DIMM) specification - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 21
DDR SDRAM moves large amounts of data more slowly. The Rambus design consists of three key elements: RDRAMs, Rambus application-specific integrated circuits, and an interconnect called the Rambus Channel. The Rambus design provides higher performance than traditional SDRAM because RDRAM transfers - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 22
eight repeater chips can be placed on the memory controller, and 32 RDRAM devices can be placed on each channel. This allows one channel to support a maximum of 256 devices. However, using the repeater chips will add 1 to 1.5 clocks of additional delay. To account for differences in distance of the - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 23
option kits precisely match the capabilities and requirements of the ProLiant server for which they are designated. HP memory option kits are listed in each server's user guide and in the product QuickSpecs available at www.hp.com. Conclusion The increasing performance gap between processors and - Compaq BL10e | Memory technology evolution: an overview of system memory technol - Page 24
HP ProLiant servers Web address http://www.jedec.org http://h18004.www1.hp.com/products/servers/technology HP products and services are set forth in the express warranty statements accompanying such products and services. Nothing herein should be construed as constituting an additional warranty. HP
Abstract
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Introduction
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Basic DRAM operation
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DRAM storage density and power consumption
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Memory access time
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System bus timing
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Memory bus speed
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Burst mode access
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SDRAM technology
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Bank interleaving
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Increased bandwidth
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Registered SDRAM modules
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DIMM configurations
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Single-sided and double-sided DIMMs
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Single-rank, dual-rank, and quad-rank DIMMs
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DIMM error detection/correction technologies
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The increasing possibility of memory errors
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Basic ECC memory
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Advanced ECC memory
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Memory protection technologies
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Online spare memory mode
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Mirrored memory mode
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Lockstep memory mode
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Memory protection mode summary
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Advanced memory technologies
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Double data rate SDRAM technologies
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DDR-1
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DDR-2
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DDR-3
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Module naming convention and peak bandwidth
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Fully-buffered DIMMs
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Rambus DRAM
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Importance of using HP-certified memory modules in ProLiant servers
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23
Conclusion
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For more information
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Call to action
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Memory technology evolution:
an overview of system memory technologies
technology brief, 8
th
edition