Fujitsu MHN2100AT Manual/User Guide

Fujitsu MHN2100AT - Mobile 10 GB Hard Drive Manual

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  • Fujitsu MHN2100AT | Manual/User Guide - Page 1
    C141-E120-02EN MHN2300AT, MHN2200AT, MHN2150AT, MHN2100AT DISK DRIVES PRODUCT MANUAL
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    PROPERTY. While FUJITSU has sought to ensure the accuracy of all information in this manual, FUJITSU assumes no instructions contained herein; including any liability for incidental or consequential damages arising therefrom. FUJITSU , medical devices for life support, or weapons firing controls)
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    Revision History Edition Date Revised section (*1) (Added/Deleted/Altered) 01 2001-02-28 - 02 2001-09-03 Table 1.2 Table 1.3 Table 1.6 1.10 Load/Unload Function 3-1 page 3.1 Dimension (6)Handling caution 3.2 Table 5.3 CHAPTER 5 Interface CHAPTER 6 Operation (1/1) Details - Order No. was
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    compatible with the ATA interface. This manual describes the specifications and functions of the drives and explains in detail how to incorporate the drives into user systems. This manual assumes that the reader has a basic knowledge of hard disk drives and their implementations in computer systems
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    : Avoid mounting the disk drive near strong magnetic sources such as loud speakers. Ensure that the disk drive is not affected by external Attention Please forward any comments you may have regarding this manual. To make this manual easier for users to understand, opinions from readers are needed.
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    defects that involve adjustment, repair, or replacement. Fujitsu is not liable for any other disk drive defects, such as those caused by user misoperation or mishandling, inappropriate operating environments, defects in the power supply or cable, problems of the host system, or other causes outside
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    Important Alert Messages The important alert messages in this manual are as follows: A hazardous situation could result not press the cover of the disk drive. Pressing it too hard, the cover and the spindle motor contact, which may cause damage to the disk drive. Static: When handling the device,
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    > • Device Overview • Device Configuration • Installation Conditions • Theory of Device Operation • Interface • Operations MHN2300AT, MHN2200AT, MHN2150AT, MHN2100AT DISK DRIVES MAINTENANCE MANUAL (C141-E120) • Maintenance and Diagnosis • Removal and Replacement Procedure C141-E120-02EN vii
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    1.2 Device Specifications 1-4 1.2.1 Specifications summary 1-4 1.2.2 Model and product number 1-5 1.3 Power Requirements 1-5 1.4 2-1 2.1 Device Configuration 2-2 2.2 System Configuration 2-4 2.2.1 ATA interface 2-4 2.2.2 1 drive connection 2-4 2.2.3 2 drives connection 2-4 C141-E120-02EN ix
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    CN1) 3-11 3.4 Jumper Settings 3-11 3.4.1 Location of setting jumpers 3-11 3.4.2 Factory default setting 3-12 3.4.3 Master drive-slave drive setting 3-12 3.4.4 CSEL setting 3-13 CHAPTER 4 Theory of Device Operation 4-1 4.1 Outline 4-2 4.2 Subassemblies 4-2 4.2.1 Disk 4-2 4.2.2 Head 4-2 4.2.3 Spindle
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    4.6.2 Write circuit 4-10 4.6.3 Read circuit 4-13 4.6.4 Digital PLL circuit 4-14 4.7 Servo Control 4-15 4.7.1 Servo control circuit 4-15 4.7.2 Data-surface servo format 4-18 4.7.3 Servo frame format 4-20 4.7.4 Actuator motor control 4-21 4.7.5 Spindle motor control 4-22 Contents CHAPTER 5 Interface
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    Contents 5.5.3.1 Initiating an Ultra DMA data in burst 5-100 5.5.3.2 The data in transfer 5-101 5.5.3.3 Pausing an Ultra DMA data in burst 5-101 5.5.3.4 Terminating an Ultra DMA data in burst 5-102 5.5.4 Ultra DMA data out commands 5-105 5.5.4.1 Initiating an Ultra DMA data out burst 5-105 5.5.4.2
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    Glossary 6.2 Power Save 6-7 6.2.1 Power save mode 6-7 6.2.2 Power commands 6-8 6.3 Defect Management 6-9 6.3.1 Spare area 6-9 6.3.2 Alternating defective sectors 6-9 6.4 Read-Ahead Cache 6-11 6.4.1 Data buffer configuration 6-12 6.4.2 Caching operation 6-12 6.4.3 Usage of read segment 6-14 6.4.3.1
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    Figure 2.3 1 drive system configuration 2-4 Figure 2.4 2 drives configuration 2-4 Figure 3.1 Dimensions 3-2 Figure 3.2 Orientation 3-3 Figure 3.3 Mounting frame structure 3-4 Figure 3.4 Location of breather 3-5 Figure 3.5 Surface temperature measurement points 3-6 Figure 3.6 Service area 3-7 Figure
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    assignment 6-11 Figure 6.7 Data buffer configuration 6-12 Tables Table 1.1 Table 1.2 Table 1.3 Table 1.4 Table 1.5 Table 1.6 Specifications 1-4 Model names and product numbers 1-5 Current and power dissipation 1-6 Environmental specifications 1-7 Acoustic noise specification 1-8 Shock and
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    Contents Table 5.1 Signal assignment on the interface connector 5-3 Table 5.2 I/O registers 5-7 Table 5.3 Command code and parameters 5-14 Table 5.4 Information to be read by IDENTIFY DEVICE command 5-32 Table 5.5 Features register values and settable modes 5-41 Table 5.6 Diagnostic code 5-53 Table
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    Overview and features are described in this chapter, and specifications and power requirement are described. The MHN Series are 2.5-inch hard disk drives with built-in disk controllers. These disk drives use the AT-bus hard disk interface protocol and are compact and reliable. C141-E120-02EN 1-1
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    30 GB (MHN2300AT), 20 GB (MHN2200AT), 15 GB (MHN2150AT) and 10 GB (MHN2100AT) respectively. (3) High-speed Transfer rate The disk drives (the MHN Series) have an internal data rate up to 30.7 MB/s. The disk drive supports an external data rate up to 100 MB/s (U-DMA mode 5). (4) Average positioning
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    described in item (7), the buffer contributes to efficient I/O processing. (3) Read-ahead cache system After the execution of a disk read command, the disk drive automatically reads the subsequent data block and writes it to the data buffer (read ahead operation). This cache system enables fast data
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    Device Overview 1.2 Device Specifications 1.2.1 Specifications summary Table 1.1 shows the specifications of the disk drives (MHN Series). Table 1.1 Specifications (1/2) MHN2300AT MHN2200AT MHN2150AT MHN2100AT Format Capacity (*1) 30 GB 20 GB 15 GB 10 GB Number of Heads 4 3 2 2 Number
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    Heads 16 16 16 16 No. of Sectors 63 63 63 63 1.2.2 Model and product number Table 1.2 lists the model names and product numbers of the MHN Series. Table 1.2 Model names and product numbers Model Name MHN2300AT MHN2200AT MHN2150AT MHN2100AT Capacity (user area) 30 GB 20 GB 15 GB 10 GB Mounting
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    4.5 W 0.75 W 2.5 W 2.5 W 0.25 W 0.1 W 0.025 W/GB (rank E / MHN2300AT) 0.025 W/GB (rank E / MHN2200AT) 0.050 W/GB (rank D / MHN2150AT) 0.050 W/GB (rank D / MHN2100AT) *1 Current at starting spindle motor. *2 At 30% disk accessing. *3 Power requirements reflect nominal values for +5V power. *4 Energy
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    1.4 Environmental Specifications Figure 1.1 Current fluctuation (Typ.) at +5V when power is turned on (5) Power on/off sequence The voltage detector circuits (the MHN Series) monitor +5 V. The circuits do not allow a write signal if either voltage is abnormal. These prevent data from being
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    Device Overview 1.5 Acoustic Noise Table 1.5 lists the acoustic noise specification. Table 1.5 Acoustic noise specification Item Sound Pressure • Idle mode (DRIVE READY) Specification 24 dBA typical at 1 m Note: Measure the noise from the cover top surface. 1.6 Shock and Vibration Table 1.6
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    ) The mean time to repair (MTTR) is 30 minutes or less, if repaired by a specialist maintenance staff member. (3) Service life In situations where management and handling are correct, the disk drive requires no overhaul for five years when the DE surface temperature is less than 48°C. When the DE
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    recovered by maximum read retries of drive without user's retry and ECC corrections executed according to the disk drive's error recovery procedure, and are automatically accessed by the disk drive. The user need not be head from the disk. The product supports a minimum of 300,000 normal Load
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    Emergency Unload other than Normal Unload is performed when the power is shut down while the heads are still loaded on the disk. The product supports the Emergency Unload a minimum of 20,000 times. When the power is shut down, the controlled Normal Unload cannot be executed. Therefore, the number of
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    CHAPTER 2 Device Configuration 2.1 Device Configuration 2.2 System Configuration This chapter describes the internal configurations of the hard disk drives and the configuration of the systems in which they operate. C141-E120-02EN 2-1
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    MHN Series (1) Disk (2) Head Figure 2.1 Disk drive outerview The outer diameter of the disk is 65 mm. The inner diameter is 20 mm. The number of disks used varies with the model, as described below. MHN2300AT: 2 disks MHM2200AT: 2 disks MHM2150AT: 1 disk MHM2100AT: 1 disk The heads are of the load
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    2.1 Device Configuration Head 1 0 MHN2200AT (Either of head 0 or head 3 is mounted.) MHN2150AT MHN2100AT Figure 2.2 Configuration of disk media heads (3) Spindle motor The disks are rotated by a direct drive Hall-less DC motor. (4) Actuator The actuator uses a revolving voice coil motor (VCM
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    connector and supports PIO mode 4 transfer at 16.6 MB/s, Multiword DMA mode 2 transfer at 16.6 MB/s and also U-DMA mode 5 transfer at 100 MB/s. 2.2.2 1 drive connection MHN2300AT MHNC2023020AT MMHHNC22014500AATT MHN2100AT Figure 2.3 1 drive system configuration 2.2.3 2 drives connection (Host
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    adaptor) consists of address decoder, driver, and receiver. ATA is an abbreviation of "AT attachment". The disk drive is conformed to the ATA-5 or crosstalk of the signal lines (AT bus) between the HA and the disk drive may be a great cause of the obstruction of system reliability. Thus, it
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    dimensions, installation conditions, surface temperature conditions, cable connections, and switch settings of the hard disk drives. For information about handling this hard disk drive and the system installation procedure, refer to the following Integration Guide. C141-E144 C141-E120-02EN 3-1
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    Installation Conditions 3.1 Dimensions Figure 3.1 illustrates the dimensions of the disk drive and positions of the mounting screw holes. All dimensions are in mm. 0.25 Figure 3.1 Dimensions 3-2 C141-E120-02EN
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    3.2 Mounting 3.2 Mounting (1) Orientation Figure 3.2 illustrates the allowable orientations for the disk drive. (a) Horizontal -1 (b) Horizontal -1 gravity (c) Vertical -1 gravity (d) Vertical -2 (e) Vertical -3 (f) Vertical -4 Figure 3.2 Orientation gravity C141-E120-02EN 3-3
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    Installation Conditions (2) Frame The MR head bias of the HDD disk enclosure (DE) is zero. The mounting frame is connected to SG. IMPORTANT Use M3 screw for the mounting screw and the screw length should satisfy the specification in Figure 3.3. The tightening torque must be 0.49N·m(5kgf·cm). When
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    3.2 Mounting IMPORTANT Because of breather hole mounted to the HDD, do not allow this to close during mounting. Locating of breather hole is shown as Figure 3.4. For breather hole of Figure 3.4, at least, do not allow its around φ3 to block. Figure 3.4 Location of breather C141-E120-02EN 3-5
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    mounted in a cabinet refer to the ambient temperature at a point 3 cm from the disk drive. The ambient temperature must satisfy the temperature conditions described in Section 1.4, and the airflow must be considered to prevent the DE surface temperature from exceeding
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    Service area Data corruption: Avoid mounting the disk drive near strong magnetic sources such as loud speakers. Ensure that the disk drive the cover of the disk drive. Pressing it too hard, the cover and the spindle motor contact, which may cause damage to the disk drive. Static: When handling the
  • Fujitsu MHN2100AT | Manual/User Guide - Page 46
    HDD is occasionally damaged by the impact of the driver. (2) Please observe the tightening torque of the screw strictly. M3 0.49 N·m (5 Kg·cm) - Recommended equipments ESD Shock Contents Wrist strap ESD mat Low shock driver Model JX-1200-3056-8 SKY-8A (Color Seiden Mat) SS-6500 Maker SUMITOMO
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    3.3 Cable Connections 3.3 Cable Connections 3.3.1 Device connector The disk drive has the connectors and terminals listed below for connecting external devices. Figure 3.8 shows the locations of these connectors and terminals. PCA Connector, setting pins Figure 3.8
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    the cable connectors. Table 3.2 Cable connector specifications ATA interface and power supply cable (44-pin type) Name Cable socket (44-pin type) Model 89361-144 Manufacturer BERG IMPORTANT For the host interface cable, use a ribbon cable. A twisted cable or a cable with wires that have become
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    connector (CN1). Figure 3.10 Power supply connector pins (CN1) 3.4 Jumper Settings 3.4.1 Location of setting jumpers Figure 3.11 shows the location of the jumpers to select drive configuration and functions. Figure 3.11 Jumper location C141-E120-02EN 3-11
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    factory. Open Figure 3.12 Factory default setting 3.4.3 Master drive-slave drive setting Master drive (disk drive #0) or slave drive (disk drive #1) is selected. Open 1 CA 2 DB Open (a) Master drive 1 CA Open Short 2 DB (b) Slave drive Figure 3.13 Jumper setting of master or slave
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    Band D. Figure 3.14 CSEL setting Figure 3.15 and 3.16 show examples of cable selection using unique interface cables. By connecting the CSEL of the master drive to the CSEL Line (conducer) of the cable and connecting it to ground further, the CSEL is set to low level. The
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    Installation Conditions drive drive Figure 3.16 Example (2) of Cable Select 3-14 C141-E120-02EN
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    4.4 Power-on Sequence 4.5 Self-calibration 4.6 Read/write Circuit 4.7 Servo Control This chapter explains basic design concepts of the disk drive. Also, this chapter explains subassemblies of the disk drive, each sequence, servo control, and electrical circuit blocks. C141-E120-02EN 4-1
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    and MHM2100AT have one disk. Servo data is recorded on each cylinder (total 120). Servo data written at factory is read out by the read head. For servo data, see Section 4.7. 4.2.2 Head Figure 4.1 shows the head structures. MHN2300AT has 4 heads and MHN2200AT has 3 heads and MHN2150AT and MHN2100AT
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    1 0 MHN2200AT (Either of head 0 or head 3 is mounted.) MHN2150AT MHN2100AT Figure 4.1 Head structure 4.2.3 Spindle The spindle consists of a disk stack assembly and spindle motor. The disk stack assembly is activated by the direct drive sensor-less DC spindle motor, which has a speed of 4,200 rpm
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    shows the power supply configuration of the disk drive, and Figure 4.3 shows the disk drive circuit configuration. (1) Read/write circuit The read according on the servo information on the media surface. (3) Spindle motor driver circuit The circuit measures the interval of a PHASE signal generated by
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    5.0V 4.3 Circuit Configuration S-DRAM 3.3V SVC HDIC - 3.0V F-ROM 2.5V MCU & HDC RDC Figure 4.2 Power Supply Configuration C141-E120-02EN 4-5
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    Theory of Device Operation Figure 4.3 Circuit Configuration 4-6 C141-E120-02EN
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    , internal register read/write test, and work RAM read/write test. When the self-diagnosis terminates successfully, the disk drive starts the spindle motor. b) The disk drive executes self-diagnosis (data buffer read/write test) after enabling response to the ATA bus. c) After confirming that the
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    the head is positioned. To execute stable fast seek operations, external forces are occasionally sensed. The firmware of the drive measures and stores the force (value of the actuator motor drive current) that balances the torque for stopping head stably. This includes the current offset in the
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    open loop gain Torque constant value of the VCM has a dispersion for each drive, and varies depending on the cylinder that the head is positioned. To the state that the head is positioned to any cylinder. The firmware calculates the loop gain from the position signal and stores the compensation
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    . In other words, if a disk read or write service is necessary, the disk drive positions the head to the track requested by the host, , that avoids error writing. 4.6.2 Write circuit The write data is output from the hard disk controller (HDC) with the NRZ data format, and sent to the encoder circuit
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    4.6 Read/write Circuit Table 4.1 Write precompensation algorithm Bits 111001 111010 : 111111 000000 000001 : 010000 : 100000 Compensation -7 -6 -1 ±0 +1 +16 +32 C141-E120-02EN 4-11
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    Theory of Device Operation HDIC WDX/WDY RDC Write PreCompensation SD SC SE Serial I/O Registers Digital PLL Flash Digitizer RDX/RDY AGC Amplifier Programmable Filter MEEPR Viterbi Detect ServoPulse Detector 16/17 ENDEC Position A/B/C/D (to reg) WTGATE REFCLK RDGATE DATA RWCLK SRV_CLK
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    the read signal. Cut-off frequency of the low-pass filter and boost-up gain are controlled from the register in read channel by an instruction of the serial data signal from MPU (M5). The MPU optimizes the cut-off frequency and boost-up gain according to the transfer frequency of
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    data into the 16-bit NRZ data. 4.6.4 Digital PLL circuit The drive uses constant density recording to increase total capacity. This is different from recording density of the inner cylinder of each zone is nearly constant. The drive divides data area into 15 zones to set the data transfer rate. The
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    Position Sense SVC (3) DAC (4) Power Amp VCM current (7) CSR VCM CSR: Current Sense Resister VCM: Voice Coil Motor (5) Spindle motor control (6) Driver Spindle motor Figure 4.7 Block diagram of servo control circuit (1) Microprocessor unit (MPU) The MPU includes the DSP unit, and the MPU
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    below. a. Spindle motor start Starts the spindle motor and accelerates it to normal speed when power is applied. b. Move head to reference cylinder Drives the VCM to position the head at the any cylinder in the data area. The logical initial cylinder is at the outermost circumference (cylinder
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    . (3) D/A converter (DAC) The D/A converter (DAC) converts the VCM drive current value (digital value) calculated by the DSP unit into analog values and motor coil according to the differentiation (aberration). (6) Driver circuit The driver circuit is a power amplitude circuit that receives signals
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    Theory of Device Operation 4.7.2 Data-surface servo format Figure 4.8 describes the physical layout of the servo frame. The three areas indicated by (1) to (3) in Figure 4.8 are described below. (1) Inner guard band This area is located inside the user area, and the rotational speed of the VCM can
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    4.7 Servo Control Servo frame (120 servo frames per revolution) IGB Data area expand OGB CYLn + 1 CYLn CYLn - 1 (n: even number) W/R Recovery Servo Mark Gray Code W/R Recovery Servo Mark Gray Code W/R Recovery Servo Mark Gray Code Diameter direction Erase Servo B Servo A Erase Erase
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    Theory of Device Operation 4.7.3 Servo frame format As the servo information, the IDD uses the two-phase servo generated from the gray code and servo A to D. This servo information is used for positioning operation of radius direction and position detection of circumstance direction. The servo frame
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    surface. The MPU fetches the position sense data on the servo frame at a constant interval of sampling time, executes calculation, and updates the VCM drive current. The servo control of the actuator includes the operation to move the head to the reference cylinder, the seek operation to move the
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    necessity of access to the disk. If a read/write instruction is issued, the MPU seeks the desired track. The DSP drives the VCM by feeding micro current. For each sampling time, the VCM drive current motor driver (called SVC hereafter). The firmware operates on the MPU manufactured by Fujitsu. The
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    4.7 Servo Control d) During phase switching, the spindle motor starts rotating in low speed, and generates a counter electromotive force. The SVC detects this counter electromotive force and reports to the MPU using a PHASE signal for speed detection. e) The MPU is waiting for a PHASE signal. When
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    CHAPTER 5 Interface 5.1 Physical Interface 5.2 Logical Interface 5.3 Host Commands 5.4 Command Protocol 5.5 Ultra DMA Feature Set 5.6 Timing This chapter gives details about the interface, and the interface commands and timings. C141-E120-02EN 5-1
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    Interface 5.1 Physical Interface 5.1.1 Interface signals Figure 5.1 shows the interface signals. Host IDD DATA 0-15: DATA BUS DMACK-: DMA ACKNOWLEDGE DMARQ: DMA REQUEST INTRO: INTERRUPT REQUEST DIOW-: I/O WRITE STOP: STOP DURING ULTRA DMA DATA BURSTS DIOR-:I/O READ HDMARDY:DMA READY DURING
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    5.1 Physical Interface 5.1.2 Signal assignment on the connector Table 5.1 shows the signal assignment on the interface connector. Table 5.1 Signal assignment on the interface connector Pin No. A C E 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 Signal MSTR unused (KEY) RESET-
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    Interface [signal] ENCSEL MSTRRESETDATA 0-15 DIOWSTOP DIORHDMARDY- HSTROBE INTRQ [I/O] I I I I/O I I I I I O [Description] This signal is used to set master/slave using the CSEL signal (pin 28). Pins B and D Open: Sets master/slave using the CSEL signal is disabled. Short: Sets master/slave using
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    5.1 Physical Interface [signal] CS0CS1DA 0-2 KEY PDIAG- CBLIDDASPIORDY DDMARDY - DSTROBE CSEL DMACK- [I/O] I I I I/O I/O I/O O O O I I [Description] Chip select signal decoded from the host address bus. This signal is used by the host to select the command block registers. Chip select signal
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    in either address-specified mode; cylinder-head-sector (CHS) or Logical block address (LBA) mode. The IDENTIFY DEVICE information indicates whether the device supports the LBA mode. When the host system specifies the LBA mode by setting bit 6 in the Device/Head register to 1, HS3 to HS0 bits
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    The registers for read or write operation other than the Data registers can be accessed by 8 bit data bus (DATA0 to DATA7). 3. When reading the Drive Address register, bit 7 is high-impedance state. 4. H indicates signal level High and L indicates signal level Low. And the LBA mode is specified, the
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    Interface 5.2.2 Command block registers (1) Data register (X'1F0') The Data register is a 16-bit register for data block transfer between the device and the host system. Data transfer mode is PIO or DMA mode. (2) Error register (X'1F1') The Error register indicates the status of the command
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    5.2 Logical Interface [Diagnostic code] X'01': No Error Detected. X'02': HDC Register Compare Error X'03': Data Buffer Compare Error. X'05': ROM Sum Check Error. X'80': Device 1 (slave device) Failed. Error register of the master device is valid under two devices (master and slave) configuration. If
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    Interface (6) Cylinder Low register (X'1F4') The contents of this register indicates low-order 8 bits of the starting cylinder address for any disk-access. At the end of a command, the contents of this register are updated to the current cylinder number. Under the LBA mode, this register indicates
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    5.2 Logical Interface (9) Status register (X'1F7') The contents of this register indicate the status of the device. The contents of this register are updated at the completion of each command. When the BSY bit is cleared, other bits in this register should be validated within 400 ns. When the BSY
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    Interface - Bit 5: The Device Write Fault (DF) bit. This bit indicates that a device fault (write fault) condition has been detected. If a write fault is detected during command execution, this bit is latched and retained until the device accepts the next command or reset. - Bit 4: Device Seek
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    5.3 Host Commands 5.2.3 Control block registers (1) Alternate Status register (X'3F6') The Alternate Status register contains the same information as the Status register of the command block register. The only difference from the Status register is that a read of this register does not imply
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    system writes to the command register, the correct device operation is not guaranteed. 5.3.1 Command code and parameters Table 5.3 lists the supported commands, command code and the registers that needed parameters are written. Table 5.3 Command code and parameters (1 of 2) Command name Command
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    FLUSH CACHE 1 1 1 0 0 1 1 1 NNNND DEVICE CONFIGURATION 1 0 1 1 0 0 0 1 YNNND Notes: FR: Features Register CY: Cylinder Registers SC: Sector Count Register DH: Drive/Head Register SN: Sector Number Register R: Retry at error 1 = Without retry 0 = With retry Y: Necessary to set parameters C141
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    Interface Y*: Necessary to set parameters under the LBA mode. N: Not necessary to set parameters (The parameter is ignored if it is set.) N*: May set parameters D: The device parameter is valid, and the head parameter is ignored. D*: The command is addressed to the master device, but both the master
  • Fujitsu MHN2100AT | Manual/User Guide - Page 93
    5.3 Host Commands CM: Command register FR: Features register DH: Device/Head register ST: Status register CH: Cylinder High register ER: Error register CL: Cylinder Low register L: LBA (logical block address) setting bit SN: Sector Number register DV: Device address. bit SC: Sector Count
  • Fujitsu MHN2100AT | Manual/User Guide - Page 94
    Interface At command issuance (I/O registers setting contents) 1F7 (CM) H 1F6H(DH) 1F5 (CH) H 1F4 (CL) H 1F3H(SN) 1F2H(SC) 1F1H(FR) 0 0 1 0 0 0 0R x L x DV Start head No. / LBA [MSB] Start cylinder No. [MSB] / LBA Start cylinder No. [LSB] / LBA Start sector No. / LBA [LSB] Transfer sector count
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    5.3 Host Commands final partial block is transferred. The number of sectors in the partial block to be transferred is n where n = remainder of ("number of sectors"/"block count"). If the READ MULTIPLE command is issued before the SET MULTIPLE MODE command is executed or when the READ MULTIPLE
  • Fujitsu MHN2100AT | Manual/User Guide - Page 96
    Interface At command completion (I/O registers contents to be read) 1F7H(ST) 1F6H(DH) 1F5 (CH) H 1F4 (CL) H 1F3H(SN) 1F2H(SC) 1F1H(ER) Status information x L x DV End head No. / LBA [MSB] End cylinder No. [MSB] / LBA End cylinder No. [LSB] / LBA End sector No. / LBA [LSB] 00(*1) Error information
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    5.3 Host Commands At command issuance (I/O registers setting contents) 1F7 (CM) H 1F6H(DH) 1F5 (CH) H 1F4 (CL) H 1F3H(SN) 1F2H(SC) 1F1H(FR) 1 1 0 0 1 0 0R x L x DV Start head No. / LBA [MSB] Start cylinder No. [MSB] / LBA Start cylinder No. [LSB] / LBA Start sector No. / LBA [LSB] Transfer sector
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    Interface At command issuance (I/O registers setting contents) 1F7 (CM) H 1F6H(DH) 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2 (SC) H 1F1 (FR) H 0100000 R x L x DV Start head No. / LBA [MSB] Start cylinder No. [MSB] / LBA Start cylinder No. [LSB] / LBA Start sector No. / LBA [LSB] Transfer sector count xx At
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    5.3 Host Commands If an error occurs during multiple sector write operation, the write operation is terminated at the sector where the error occurred. Command block registers contain the cylinder, the head, the sector addresses (in the CHS mode) or the logical block address (in the LBA mode) of the
  • Fujitsu MHN2100AT | Manual/User Guide - Page 100
    Interface (6) WRITE MULTIPLE (X'C5') This command is similar to the WRITE SECTOR(S) command. The device does not generate interrupts (assertion of the INTRQ) signal) on each sector but on the transfer of a block which contains the number of sectors for which the number is defined by the SET MULTIPLE
  • Fujitsu MHN2100AT | Manual/User Guide - Page 101
    5.3 Host Commands At command issuance (I/O registers setting contents) 1F7 (CM) H 1F6H(DH) 1F5 (CH) H 1F4 (CL) H 1F3H(SN) 1F2H(SC) 1F1H(FR) 11000101 x L x DV Start head No. / LBA [MSB] Start cylinder No. [MSB] / LBA Start cylinder No. [LSB] / LBA Start sector No. / LBA [LSB] Transfer sector count
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    Interface A host system can select the following transfer mode using the SET FEATURES command. • Multiword DMA transfer mode 0 to 2 • Ultra DMA transfer mode 0 to 5 At command issuance (I/O registers setting contents) 1F7H(CM) 1F6H(DH) 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1 (FR) H 1 1 0 0 1 0
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    5.3 Host Commands At command issuance (I/O registers setting contents) 1F7 (CM) H 1F6H(DH) 1F5 (CH) H 1F4 (CL) H 1F3H(SN) 1F2H(SC) 1F1H(FR) 00111100 x L x DV Start head No. / LBA [MSB] Start cylinder No. [MSB] / LBA Start cylinder No. [LSB] / LBA Start sector No. / LBA [LSB] Transfer sector count
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    Interface At command issuance (I/O registers setting contents) 1F7 (CM) 0 0 0 1 x x x x H 1F6H(DH) x x x DV xx 1F5H(CH) xx 1F4H(CL) xx 1F3H(SN) xx 1F2 (SC) xx H 1F1 (FR) xx H At command completion (I/O registers contents to be read) 1F7H(ST) 1F6H(DH) 1F5 (CH) H 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1H(ER)
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    5.3 Host Commands At command issuance (I/O registers setting contents) 1F7 (CM) H 1F6H(DH) 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2 (SC) H 1F1 (FR) H 0111xxxx x L x DV Head No. / LBA [MSB] Cylinder No. [MSB] / LBA Cylinder No. [LSB] / LBA Sector No. / LBA [LSB] xx xx At command completion (I/O registers
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    (12) IDENTIFY DEVICE (X'EC') The host system issues the IDENTIFY DEVICE command to read parameter information from the device. Upon receipt of this command, the drive sets the BSY bit to one, prepares to transfer the 256 words of device identification data to the host, sets the DRQ bit to one
  • Fujitsu MHN2100AT | Manual/User Guide - Page 107
    5.3 Host Commands (13) IDENTIFY DEVICE DMA (X'EE') When this command is not used to transfer data to the host in DMA mode, this command functions in the same way as the Identify Device command. At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 1 0 1 1 1 0 1F6 (DH) x x x DV xx H 1F5H(
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    Interface At command issuance (I/O registers setting contents) 1F7 (CM) 1 1 1 0 1 1 0 0 H 1F6H(DH) x x x DV xx 1F5H(CH) xx 1F4H(CL) xx 1F3H(SN) xx 1F2 (SC) xx H 1F1 (FR) xx H At command completion (I/O registers contents to be read) 1F7 (ST) H 1F6H(DH) 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1 (ER)
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    003C' X'0000' X'346B' X'5B08' X'4003' Description Firmware revision (ASCII code, 8 characters, left) Model name (ASCII code, 40 characters, left) Maximum number of Reserved Multiword DMA transfer mode *7 Advance PIO transfer mode support status *8 Minimum multiword DMA transfer cycle time per word
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    device = 0, ATAPI device = 1 Bit 14-8: Undefined Bit 7: Removable disk drive = 1 Bit 6: Fixed drive = 1 Bit 5-3: Undefined Bit 2: IDENTIFY DEVICE Valid = 0 Bit 1-0: ' X'1C21B00' *3 Word 49: Capabilities Bit 15-14: Reserved MHN2100AT X'3FFF' X'10' X'3F' X'12BB230' 5-34 C141-E120-02EN
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    5.3 Host Commands Bit 13: Standby timer value. Factory default is '0.' ATA spec is '1.' Bit 12: Reserved Bit 11: 1 = Supported Bit 10: 0 = Disable inhibition Bit 7-0: Undefined Bit 8: 1 = LBA Supported Bit 9: 1 = DMA Supported *4 Word 51: PIO data transfer mode Bit 15-8: PIO data transfer
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    Area feature set. Bit 9: '1' = Supports the DEVICE RESET command. Bit 8: '1' = Supports the SERVICE interrupt. Bit 7: '1' = Supports the release interrupt. Bit 6: '1' = Supports the read cache function. Bit 5: '1' = Supports the write cache function. Bit 4: '1' = Supports the PACKET command feature
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    Undefined. Bit 2: '1' = Supports the Media Serial Number. Bit 1: '1' = Supports the SMART SELF-TEST. Bit 0: '1' = Supports the SMART Error Logging. *13 '1' = Enables the DEVICE RESET command. Bit 8: '1' = Enables the SERVICE interrupt. Bit 7: '1' = Enables the release interrupt. Bit 6: '1' =
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    used Ultra DMA transfer mode Bit 7-0: Supportable Ultra DMA transfer mode Bit 5: '1' = Supports the Mode 5 Bit 4: '1' = Supports the Mode 4 Bit 3: '1' = Supports the Mode 3 Bit 2: '1' = Supports the Mode 2 Bit 1: '1' = Supports the Mode 1 Bit 0: '1' = Supports the Mode 0 5-38 C141-E120-02EN
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    VIH. '0' = CBLID- is a level lower than VIL. Bits 12-8: In the case of Device 1 (slave drive), a valid value is set. Bit 12: Reserved Bit 11: '1' = Device asserts PDIAG-. Bit 10, 9: Method High, 1: Maximum Bit 7-6: Reserved Bit 5: '1' = Enhanced security erase supported C141-E120-02EN 5-39
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    parameters in the Features register. Then, the device clears the BSY bit, and generates an interrupt. If the value in the Features register is not supported or it is invalid, the device posts an ABORTED COMMAND error. Table 5.5 lists the available values and operational modes that may be set in
  • Fujitsu MHN2100AT | Manual/User Guide - Page 117
    5.5 Features register values and settable modes Features Register X'02' X'03' X'05' X'42' X'55' X'66' X'82' X'85' X'AA' X'BB' X'C2' X'CC' Drive operation mode Enables the write cache function. Set the data transfer mode. *1 Enables the advanced power management function. *2 Enables the Acoustic
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    be selected. Upper 5 bits of the Sector Count register defines the transfer type and lower 3 bits specifies the binary mode value. The IDD supports following values in the Sector Count register value. If other value than below is specified, an ABORTED COMMAND error is posted. PIO default transfer
  • Fujitsu MHN2100AT | Manual/User Guide - Page 119
    , and Low power Idle to Standby. The Mode-3 takes the maximum shifting time in the APM level. The APM level setting is preserved by the drive across power on, hardware and software resets. APM Level Mode-0 Low Power Idle Mode-1 Low Power Idle Mode-2 Standby Mode-3 Standby Reserved Sector Count
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    is enabled. The AAM level setting is preserved by the drive across power on, hardware and software resets. AAM Level command. The number of sectors per block is written into the Sector Count register. The IDD supports 2, 4, 8, 16 and 32 (sectors) as the block counts. Upon receipt of this command
  • Fujitsu MHN2100AT | Manual/User Guide - Page 121
    5.3 Host Commands At command issuance (I/O registers setting contents) 1F7 (CM) 1 1 0 0 0 1 1 0 H 1F6H(DH) x x x DV xx 1F5H(CH) xx 1F4H(CL) xx 1F3H(SN) xx 1F2 (SC) Sector count/block H 1F1 (FR) xx H After power-on the READ MULTIPLE and WRITE MULTIPLE command operation are disabled as the default
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    command is held even after power on and the occurrence of a hard reset. When the VV bit is 0, the value set by this command becomes invalid when not set) most lately set when VV bit = 1. After power on and the occurrence of a hard reset, the host can issue this command only once when VV bit = 1. If this command
  • Fujitsu MHN2100AT | Manual/User Guide - Page 123
    5.3 Host Commands At command completion (I/O registers contents to be read) 1F7 (ST) H 1F6H(DH) 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1H(ER) Status information x x x DV Max head/LBA [MSB] Max. cylinder [MSB]/Max. LBA Max. cylinder [LSB]/Max. LBA Max. sector/Max. LBA [LSB] xx Error information •
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    Interface At command completion (I/O registers contents to be read) 1F7 (ST) H 1F6H(DH) 1F5 (CH) H 1F4 (CL) H 1F3H(SN) 1F2H(SC) 1F1H(ER) Status information xx xx xx xx xx Error information Words 0 1 to 16 17 to 255 Password information Contents Reserved Password (32 bytes) Reserved • SET MAX
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    5.3 Host Commands At command issuance (I/O registers setting contents) 1F7 (CM) 1 1 1 1 1 0 0 1 H 1F6H(DH) x x x DV xx 1F5H(CH) xx 1F4H(CL) xx 1F3H(SN) xx 1F2H(SC) xx 1F1H(FR) 02 At command completion (I/O registers contents to be read) 1F7 (ST) H 1F6H(DH) 1F5H(CH) 1F4 (CL) H 1F3 (SN) H 1F2 (SC)
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    Interface At command issuance (I/O registers setting contents) 1F7 (CM) 1 1 1 1 1 0 0 1 H 1F6H(DH) x x x DV xx 1F5H(CH) xx 1F4H(CL) xx 1F3H(SN) xx 1F2H(SC) xx 1F1H(FR) 03 At command completion (I/O registers contents to be read) 1F7 (ST) H 1F6H(DH) 1F5H(CH) 1F4 (CL) H 1F3 (SN) H 1F2 (SC) H 1F1H(
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    5.3 Host Commands At command issuance (I/O registers setting contents) 1F7 (CM) 1 1 1 1 1 0 0 1 H 1F6H(DH) x x x DV xx 1F5H(CH) xx 1F4H(CL) xx 1F3H(SN) xx 1F2H(SC) xx 1F1H(FR) 04 At command completion (I/O registers contents to be read) 1F7 (ST) H 1F6H(DH) 1F5H(CH) 1F4 (CL) H 1F3 (SN) H 1F2 (SC)
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    DEVICE DIAGNOSTIC (X'90') This command performs an internal diagnostic test (self-diagnosis) of the device. This command usually sets the DRV bit of the Drive/Head register is to 0 (however, the DV bit is not checked). If two devices are present, both devices execute self-diagnosis. If device 1 is
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    Table 5.6 Diagnostic code Code X'01' X'03' X'05' X'8x' Result of diagnostic No error detected. Data buffer compare error ROM sum check error Failure of device 1 5.3 Host Commands attention: The device responds to this command with the result of power-on diagnostic test. At command issuance (I/O
  • Fujitsu MHN2100AT | Manual/User Guide - Page 130
    is not performed for this command. This command is used for checking ECC function by combining with the WRITE LONG command. The READ LONG command supports only single sector operation. Number of ECC bytes to be transferred is fixed to 4 bytes and cannot be changed by the SET FEATURES command. At
  • Fujitsu MHN2100AT | Manual/User Guide - Page 131
    the ECC bytes transferred from the host system to the disk medium. The device does not generate ECC bytes by itself. The WRITE LONG command supports only single sector operation. The number of ECC bytes to be transferred is fixed to 4 bytes and can not be changed by the SET FEATURES
  • Fujitsu MHN2100AT | Manual/User Guide - Page 132
    Interface (21) READ BUFFER (X'E4') The host system can read the current contents of the data buffer of the device by issuing this command. Upon receipt of this command, the device sets the BSY bit of Status register and sets up for a read operation. Then the device sets the DRQ bit of Status
  • Fujitsu MHN2100AT | Manual/User Guide - Page 133
    5.3 Host Commands (22) WRITE BUFFER (X'E8') The host system can overwrite the contents of the data buffer of the device with a desired data pattern by issuing this command. Upon receipt of this command, the device sets the BSY bit of the Status register. Then the device sets the DRQ bit of Status
  • Fujitsu MHN2100AT | Manual/User Guide - Page 134
    Interface (23) IDLE (X'97' or X'E3') Upon receipt of this command, the device sets the BSY bit of the Status register, and enters the idle mode. Then, the device clears the BSY bit, and generates an interrupt. The device generates an interrupt even if the device has not fully entered the idle mode.
  • Fujitsu MHN2100AT | Manual/User Guide - Page 135
    of the Status register, and enters the idle mode. Then, the device clears the BSY bit, and generates an interrupt. This command does not support the automatic power-down function. At command issuance (I/O registers setting contents) 1F7H(CM) 1F6 (DH) H 1F5H(CH) 1F4H(CL) 1F3 (SN) H 1F2 (SC) H 1F1H
  • Fujitsu MHN2100AT | Manual/User Guide - Page 136
    spindle motor is stopped. Thus, when the command involving a seek such as the READ SECTOR(s) command is received, the device processes the command after driving the spindle motor. At command issuance (I/O registers setting contents) 1F7 (CM) H 1F6H(DH) 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2 (SC) H 1F1 (FR
  • Fujitsu MHN2100AT | Manual/User Guide - Page 137
    bit of the Status register and enters the standby mode. The device then clears the BSY bit and generates an interrupt. This command does not support the automatic power-down sequence. At command issuance (I/O registers setting contents) 1F7H(CM) 1F6H(DH) 1F5 (CH) H 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1H
  • Fujitsu MHN2100AT | Manual/User Guide - Page 138
    Interface (27) SLEEP (X'99' or X'E6') This command is the only way to make the device enter the sleep mode. Upon receipt of this command, the device sets the BSY bit of the Status register and enters the sleep mode. The device then clears the BSY bit and generates an interrupt. The device generates
  • Fujitsu MHN2100AT | Manual/User Guide - Page 139
    5.3 Host Commands (28) CHECK POWER MODE (X'98' or X'E5') The host checks the power mode of the device with this command. The host system can confirm the power save mode of the device by the contents of the Sector Count register. The device sets the BSY bit and sets the following register value.
  • Fujitsu MHN2100AT | Manual/User Guide - Page 140
    ) This command performs operations for device failure predictions according to a subcommand specified in the FR register. If the value specified in the FR register is supported, the Aborted Command error is posted. It is necessary for the host to set the keys (CL = 4Fh and CH = C2h) in the CL and
  • Fujitsu MHN2100AT | Manual/User Guide - Page 141
    5.3 Host Commands Table 5.7 Features Register values (subcommands) and functions (1 of 3) Features Resister X'D0' X'D1' X'D2' X'D3' X'D4' Function SMART Read Attribute Values: A device that received this subcommand asserts the BSY bit and saves all the updated attribute values. The device then
  • Fujitsu MHN2100AT | Manual/User Guide - Page 142
    Interface Table 5.7 Features Register values (subcommands) and functions (2 of 3) Features Resister X'D5' Function SMART Read Log Sector: A device which receives this sub-command asserts the BSY bit, then reads the log sector specified in the SN register. Next, it clears the BSY bit and transmits
  • Fujitsu MHN2100AT | Manual/User Guide - Page 143
    collection in the enabled (when the SC register specification ≠ 00h) or disabled (when the SC register specification = 00) state. This setting is preserved whether the drive's power is switched on or off. If 24 hours have passed since the power was switched on, or since the last time that off-line
  • Fujitsu MHN2100AT | Manual/User Guide - Page 144
    Interface At command completion (I-O registers setting contents) 1F7 (ST) H 1F6H(DH) 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2 (SC) H 1F1 (ER) H Status information x x x DV xx Key-failure prediction status (C2h/2Ch) Key-failure prediction status (4Fh/F4h) xx xx Error information The attribute value
  • Fujitsu MHN2100AT | Manual/User Guide - Page 145
    collection status Self test execution status Off-line data collection execution time [sec.] Reserved Off-line data collection capability Trouble prediction capability flag Error logging capability Vendor unique Simple self test execution time [min.] Comprehensive self test execution time
  • Fujitsu MHN2100AT | Manual/User Guide - Page 146
    Out • Status Flag Bit Meaning 0 If this bit 1, it indicates that if the attribute exceeds the threshold, it is the attribute covered by the drive warranty. 1 If this bit is 1 (0), it indicates the attribute only updated by an on- line test (off-line test). 2 If this bit 1, it indicates
  • Fujitsu MHN2100AT | Manual/User Guide - Page 147
    the attribute that represents the number of occurrences. If this bit 1, it indicates the attribute that can be collected/saved even if the drive fault prediction function is disabled. Reserve bit • Current attribute value The current attribute value is the normalized raw attribute data. The value
  • Fujitsu MHN2100AT | Manual/User Guide - Page 148
    by the host computer. Self-test has been suspended by hard or soft reset. Self-test has been aborted by a drive. If the off-line data collection capability is 0, it indicates that off-line data collection is not supported. Bit Meaning 0 Indicates that Execute Off-Line Immediate is supported
  • Fujitsu MHN2100AT | Manual/User Guide - Page 149
    5.3 Host Commands • Check sum Two's complement of the lower byte, obtained by adding 511-byte data one byte at a time from the beginning. • Insurance failure threshold The limit of a varying attribute value. The host compares the attribute values with the thresholds to identify a failure. Table 5.
  • Fujitsu MHN2100AT | Manual/User Guide - Page 150
    Interface Table 5.11 SMART error log data format Byte Item 00 Error log version number 01 Error log index 02 Error log 1 Command Data 1 Device Control register 03 Features register 04 Sector Count register 05 Sector Number register 06 Cylinder Low register 07 Cylinder High
  • Fujitsu MHN2100AT | Manual/User Guide - Page 151
    are included in Command Data 5. • Error data Indicates the I/O register values when the error is reported. • Status Bits 0 to 3: Indicates the drive status when received error commands according to the following table. Bits 4 to 7: Vendor unique Status 0 1 2 3 4 5 to F Meaning Unclear status Sleep
  • Fujitsu MHN2100AT | Manual/User Guide - Page 152
    Interface Table 5.12 SMART self test log data format Byte 00, 01 02 03 04, 05 06 07 to 0A 0B to 19 1A to 1F9 1FA, 1FB 1FC 1FD, 1FE 1FF Item Self test log data format version number Self test log 1 Self test mode (SN Register Value) Self test execution status Total power on time until the
  • Fujitsu MHN2100AT | Manual/User Guide - Page 153
    5.3 Host Commands Issuing this command while in LOCKED MODE or FROZEN MODE returns the Aborted Command error. (The section about the SECURITY FREEZE LOCK command describes LOCKED MODE and FROZEN MODE.) Table 5.13 Contents of security password Word 0 1 to 16 17 to 255 Contents Control word Bit 0:
  • Fujitsu MHN2100AT | Manual/User Guide - Page 154
    Interface (31) SECURITY ERASE PREPARE (F3h) The SECURITY ERASE UNIT command feature is enabled by issuing the SECURITY ERASE PREPARE command and then the SECURITY ERASE UNIT command. The SECURITY ERASE PREPARE command prevents data from being erased unnecessarily by the SECURITY ERASE UNIT command.
  • Fujitsu MHN2100AT | Manual/User Guide - Page 155
    5.3 Host Commands Although this command invalidates the user password, the master password is retained. To recover the master password, issue the SECURITY SET PASSWORD command and reset the user password. If the SECURITY ERASE PREPARE command is not issued immediately before this command is issued,
  • Fujitsu MHN2100AT | Manual/User Guide - Page 156
    Interface • SECURITY ERASE UNIT FROZEN MODE is canceled when the power is turned off, or when hardware is reseted. If this command is reissued in FROZEN MODE, the command is completed and FROZEN MODE remains unchanged. Issuing this command during LOCKED MODE returns the Aborted Command error. The
  • Fujitsu MHN2100AT | Manual/User Guide - Page 157
    5.3 Host Commands (34) SECURITY SET PASSWORD (F1h) This command enables a user password or master password to be set. The host transfers the 512-byte data shown in Table 5.13 to the device. The device determines the operation of the lock function according to the specifications of the Identifier
  • Fujitsu MHN2100AT | Manual/User Guide - Page 158
    Interface At command issuance (I-O register contents) 1F7 (CM) 1 1 1 1 0 0 0 1 h 1F6h(DH) x x x DV xx 1F5h(CH) xx 1F4h(CL) xx 1F3h(SN) xx 1F2 (SC) xx h 1F1 (FR) xx h At command completion (I-O register contents) 1F7h(ST) 1F6 (DH) h 1F5h(CH) 1F4 (CL) h 1F3 (SN) h 1F2 (SC) h 1F1h(ER)
  • Fujitsu MHN2100AT | Manual/User Guide - Page 159
    5.3 Host Commands UNLOCK counter reaches zero, this command or the SECURITY ERASE UNIT command causes the Aborted Command error until the device is turned off and then on, or until a hardware reset is executed. Issuing this command with LOCKED MODE canceled (in UNLOCK MODE) has no affect on the
  • Fujitsu MHN2100AT | Manual/User Guide - Page 160
    Interface At command issuance (I-O register contents) 1F7 (CM) 1 1 1 0 0 1 1 1 h 1F6h(DH) x x x DV xx 1F5h(CH) xx 1F4h(CL) xx 1F3h(SN) xx 1F2 (SC) xx h 1F1 (FR) xx h At command completion (I-O register contents to be read) 1F7h(ST) 1F6 (DH) h 1F5h(CH) 1F4 (CL) h 1F3 (SN) h 1F2 (SC) h 1F1h
  • Fujitsu MHN2100AT | Manual/User Guide - Page 161
    5.3 Host Commands At command issuance (I-O register contents) 1F7 (CM) 1 0 1 1 0 0 0 1 h 1F6h(DH) x x x DV xx 1F5h(CH) xx 1F4h(CL) xx 1F3h(SN) xx 1F2 (SC) xx h 1F1 (FR) C0h/C1h/C2h/C3h h At command completion (I-O register contents) 1F7 (ST) h 1F6h(DH) 1F5h(CH) 1F4h(CL) 1F3h(SN) 1F2h(SC)
  • Fujitsu MHN2100AT | Manual/User Guide - Page 162
    commands, modes, and feature sets that the device is capable of supporting. If a DEVICE CONFIGURATION SET command has been issued reducing the command response. When the bits in these words are cleared, the device no longer supports the indicated command, mode, or feature set. If a bit is set in the
  • Fujitsu MHN2100AT | Manual/User Guide - Page 163
    5: 1 = READ/WRITE DMA QUEUED commands supported Bit 4: 1 = Power-up in Standby feature set supported Bit 3: 1 = Security feature set supported Bit 2: 1 = SMART error log supported Bit 1: 1 = SMART self-test supported Bit 0: 1 = SMART feature set supported Reserved Integrity word. Bits 15:8 contains
  • Fujitsu MHN2100AT | Manual/User Guide - Page 164
    Interface 5.3.3 Error posting Table 5.15 lists the defined errors that are valid for each command. Table 5.17 Command code and parameters (1 of 2) Command name READ SECTOR(S) WRITE SECTOR(S) READ MULTIPLE WRITE MULTIPLE READ DMA WRITE DMA WRITE VERIFY READ VERIFY SECTOR(S) RECALIBRATE SEEK
  • Fujitsu MHN2100AT | Manual/User Guide - Page 165
    5.3 Host Commands Table 5.17 Command code and parameters (2 of 2) Command name SLEEP CHECK POWER MODE SMART SECURITY DISABLE PASSWORD SECURITY ERASE PREPARE SECURITY ERASE UNIT SECURITY FREEZE LOCK SECURITY SET PASSWORD SECURITY UNLOCK FLUSH CACHE DEVICE CONFIGURATION Invalid command ICRC Error
  • Fujitsu MHN2100AT | Manual/User Guide - Page 166
    to the host, the device sets DRQ bit and clears BSY bit. The drive then asserts INTRQ signal. e) After detecting the INTRQ signal assertion, the host the Status register being read, the device negates the INTRQ signal. f) The drive clears DRQ bit to 0. If transfer of another sector is requested, the
  • Fujitsu MHN2100AT | Manual/User Guide - Page 167
    5.4 Command Protocol words, the host should receive the relevant sector of data (512 bytes of uninsured dummy data) or release the DRQ status by resetting. Figure 5.3 shows an example of READ SECTOR(S) command protocol, and Figure 5.4 shows an example protocol for command abort. Figure 5.3 Read
  • Fujitsu MHN2100AT | Manual/User Guide - Page 168
    Data transferring commands from host to device The execution of the following commands involves Data transfer from the host to the drive. • WRITE SECTOR(S) • WRITE LONG • WRITE BUFFER • WRITE VERIFY • SMART WRITE LOG SECTOR • SECURITY DISABLE PASSWORD • SECURITY ERASE UNIT • SECURITY SET PASSWORD
  • Fujitsu MHN2100AT | Manual/User Guide - Page 169
    required parameters to the Features, Sector Count, Sector Number, Cylinder, and Device/Head registers. b) The host writes a command code in the Command register. The drive sets the BSY bit of the Status register. c) When the device is ready to receive the data of the first sector, the device sets
  • Fujitsu MHN2100AT | Manual/User Guide - Page 170
    Status register does not meet above condition, normal data transfer operation is not assured guaranteed. When the host issues the command even if the drive requests the data transfer (DRQ bit is set), or when the host executes resetting, the device correct operation is not guaranteed. 5.4.3 Commands
  • Fujitsu MHN2100AT | Manual/User Guide - Page 171
    5.4 Command Protocol • SEEK • READY VERIFY SECTOR(S) • EXECUTE DEVICE DIAGNOSTIC • INITIALIZE DEVICE PARAMETERS • SET FEATURES • SET MULTIPLE MODE • SET MAX ADDRESS • READ NATIVE MAX ADDRESS • IDLE • IDLE IMMEDIATE • STANDBY • STANDBY IMMEDIATE • CHECK POWER MODE • SMART DISABLE OPERATION • SMART
  • Fujitsu MHN2100AT | Manual/User Guide - Page 172
    Interface 5.4.4 Other commands • READ MULTIPLE • SLEEP • WRITE MULTIPLE See the description of each command. 5.4.5 DMA data transfer commands • READ DMA • WRITE DMA Starting the DMA transfer command is the same as the READ SECTOR(S) or WRITE SECTOR(S) command except the point that the host
  • Fujitsu MHN2100AT | Manual/User Guide - Page 173
    5.4 Command Protocol The interrupt processing for the DMA transfer differs the following point. • The interrupt processing for the DMA transfer differs the following point. a) The host writes any parameters to the Features, Sector Count, Sector Number, Cylinder, and Device/Head register. b) The host
  • Fujitsu MHN2100AT | Manual/User Guide - Page 174
    Interface d f g d f e Figure 5.7 Normal DMA data transfer 5-98 C141-E120-02EN
  • Fujitsu MHN2100AT | Manual/User Guide - Page 175
    Ultra DMA data out burst. During an Ultra DMA burst a sender shall always drive data onto the bus, and after a sufficient time to allow for propagation delay, Devices supporting Ultra DMA Mode 2 shall also support Ultra DMA Modes 0 and 1. Devices supporting Ultra DMA Mode 1 shall also support Ultra
  • Fujitsu MHN2100AT | Manual/User Guide - Page 176
    Interface device compares its CRC data to the data sent from the host. If the two values do not match the device reports an error in the error register at the end of the command. If an error occurs during one or more Ultra DMA bursts for any one command, at the end of the command, the device shall
  • Fujitsu MHN2100AT | Manual/User Guide - Page 177
    the device shall negate DSTROBE within tFS after the host has negated STOP and asserted HDMARDY-. The device shall negate DSTROBE no sooner than t after driving the first word of data onto DVS DD (15:0). 5.5.3.2 The data in transfer The following steps shall occur in the order they are listed unless
  • Fujitsu MHN2100AT | Manual/User Guide - Page 178
    Interface NOTE - The host shall not immediately assert STOP to initiate Ultra DMA burst termination when the device stops generating STROBE edges. If the device does not negate DMARQ, in order to initiate ULTRA DMA burst termination, the host shall negate HDMARDY- and wait tRP before asserting STOP.
  • Fujitsu MHN2100AT | Manual/User Guide - Page 179
    asserted until the Ultra DMA burst is terminated. 8) If the host has not placed the result of its CRC calculation on DD (15:0) since first driving DD (15:0) during (6), the host shall place the result of its CRC calculation on DD (15:0) (see 5.5.5). 9) The host shall negate DMACK- no sooner than
  • Fujitsu MHN2100AT | Manual/User Guide - Page 180
    the result of its CRC calculation (see 5.5.5). 10) If the host has not placed the result of its CRC calculation on DD (15:0) since first driving DD (15:0) during (9), the host shall place the result of its CRC calculation on DD (15:0) (see 5.5.5). 11) The host shall negate DMACK- no sooner
  • Fujitsu MHN2100AT | Manual/User Guide - Page 181
    : the host shall negate HSTROBE no sooner than tLI after the device has asserted DDMARDY-. The host shall negate HSTROBE no sooner than t after the driving the first word of data onto DVS DD (15:0). 5.5.4.2 The data out transfer The following steps shall occur in the order they are listed unless
  • Fujitsu MHN2100AT | Manual/User Guide - Page 182
    Interface Mode. The host shall not generate two rising or falling HSTROBE edges more frequently than 2 t for the selected Ultra DMA mode. CYC 3) The host shall not change the state of DD (15:0) until at least t after DVH generating an HSTROBE edge to latch the data. 4) The host shall repeat steps
  • Fujitsu MHN2100AT | Manual/User Guide - Page 183
    5.5 Ultra DMA Feature Set 5.5.4.4 Terminating an Ultra DMA data out burst a) Host terminating an Ultra DMA data out burst The following stops shall occur in the order they are listed unless otherwise specifically allowed (see 5.6.3.10 and 5.6.3.2 for specific timing requirements): 1) The host shall
  • Fujitsu MHN2100AT | Manual/User Guide - Page 184
    Interface b) Device terminating an Ultra DMA data out burst The following steps shall occur in the order they are listed unless otherwise specifically allowed (see 5.6.3.11 and 5.6.3.2 for specific timing requirements): 1) The device shall not initiate Ultra DMA burst termination until at least one
  • Fujitsu MHN2100AT | Manual/User Guide - Page 185
    5.5 Ultra DMA Feature Set 13) The host shall neither negate STOP nor HSTROBE until at least tACK after negating DMACK-. 14) The host shall not assert DIOW-, CS0-, CS1-, DA2, DA1, or DA0 until at least tACK after negating DMACK. 5.5.5 Ultra DMA CRC rules The following is a list of rules for
  • Fujitsu MHN2100AT | Manual/User Guide - Page 186
    Interface i) The CRC generator polynomial is : G (X) = X16 + X12 + X5 + 1. Note: Since no bit clock is available, the recommended approach for calculating CRC is to use a word clock derived from the bus strobe. The combinational logic shall then be equivalent to shifting sixteen bits serially
  • Fujitsu MHN2100AT | Manual/User Guide - Page 187
    5.6 Timing 5.6 Timing 5.6.1 PIO data transfer Figure 5.9 shows of the data transfer timing between the device and the host system. t0 Addresses DIOR-/DIOW- Write data DD0-DD15 t1 t2 t9 t2i t3 t4 Read data DD0-DD15 IORDY t5 t10 t6 t11 t12 Symbol Timing parameter t0 Cycle time t1 Data
  • Fujitsu MHN2100AT | Manual/User Guide - Page 188
    Interface 5.6.2 Multiword data transfer Figure 5.10 shows the multiword DMA data transfer timing between the device and the host system. t0 DMARQ DMACK- DIOR-/DIOW- tC tJ tI tD tK Write data DD0-DD15 tG tH Read data DD0-DD15 tE tF Symbol Timing parameter t0 Cycle time tC Delay time
  • Fujitsu MHN2100AT | Manual/User Guide - Page 189
    5.6 Timing 5.6.3 Ultra DMA data transfer Figures 5.11 through 5.20 define the timings associated with all phases of Ultra DMA bursts. Table 5.20 contains the values for the timings for each of the Ultra DMA Modes. 5.6.3.1 Initiating an Ultra DMA data in burst 5.6.3.2 contains the values for the
  • Fujitsu MHN2100AT | Manual/User Guide - Page 190
    at sender (from DMACK-negation until CRC may become invalid) (*3) Time from STROBE output released-to-driving until the first transition of critical timing Time from data output releasedto-driving until the first transition of critical timing 90 First STROBE time (for device to first negate DSTROBE
  • Fujitsu MHN2100AT | Manual/User Guide - Page 191
    (*1) tAZ 10 10 10 10 10 10 Maximum time allowed for output drivers to release (from asserted or negated) tZAH 20 20 20 20 20 20 time before releasing IORDY tZIORDY 0 0 0 0 0 0 Minimum time before driving IORDY (*4) tACK 20 20 20 20 20 20 Setup and hold times for
  • Fujitsu MHN2100AT | Manual/User Guide - Page 192
    Interface Table 5.19 Ultra DMA sender and recipient timing requirements MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 (in ns) (in ns) (in ns) (in ns) (in ns) (in ns) NAME MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX COMMENT tDSIC 14.7 9.7 6.8 6.8 4.8 2.3 Recipient IC data setup time (from
  • Fujitsu MHN2100AT | Manual/User Guide - Page 193
    5.6 Timing 5.6.3.3 Sustained Ultra DMA data in burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes. DSTROBE at device DD(15:0) at device tCYC t2CYC tCYC t2CYC tDVH tDVHIC tDVS tDVSIC tDVH tDVHIC tDVS tDVSIC tDVH tDVHIC DSTROBE at host DD(15:0) at host tDH
  • Fujitsu MHN2100AT | Manual/User Guide - Page 194
    Interface 5.6.3.4 Host pausing an Ultra DMA data in burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes. DMARQ (device) DMACK- (host) STOP (host) HDMARDY(host) DSTROBE (device) DD(15:0) (device) tRP tRFS Notes: 1) The host may assert STOP to request termination of
  • Fujitsu MHN2100AT | Manual/User Guide - Page 195
    5.6 Timing 5.6.3.5 Device terminating an Ultra DMA data in burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes. DMARQ (device) DMACK(host) tMLI tLI tLI tACK STOP (host) HDMARDY(host) tSS DSTROBE (device) DD(15:0) DA0, DA1, DA2, CS0-, CS1- tLI tZAH tAZ tACK
  • Fujitsu MHN2100AT | Manual/User Guide - Page 196
    Interface 5.6.3.6 Host terminating an Ultra DMA data in burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes. DMARQ (device) DMACK(host) STOP (host) HDMARDY- (host) DSTROBE (device) tRP tRFS tLI tMLI tZAH tAZ tLI tMLI tACK tACK tIORDYZ DD(15:0) DA0, DA1, DA2,
  • Fujitsu MHN2100AT | Manual/User Guide - Page 197
    5.6 Timing 5.6.3.7 Initiating an Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes. DMARQ (device) DMACK(host) STOP (host) DDMARDY(device) HSTROBE (host) DD(15:0) (host) DA0, DA1, DA2 CS0-, CS1- tUI tACK tENV tZIORDY tLI tUI tACK tACK
  • Fujitsu MHN2100AT | Manual/User Guide - Page 198
    Interface 5.6.3.8 Sustained Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes. HSTROBE at host DD(15:0) at host tCYC t2CYC tCYC t2CYC tDVH tDVHIC tDVS tDVSIC tDVH tDVHIC tDVS tDVSIC tDVH tDVHIC HSTROBE at device DD(15:0) at device tDH
  • Fujitsu MHN2100AT | Manual/User Guide - Page 199
    5.6 Timing 5.6.3.9 Device pausing an Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes. DMARQ tRP (device) DMACK(host) STOP (host) DDMARDY(device) tRFS HSTROBE (host) DD(15:0) (host) Notes: 1) The device may negate DMARQ to request
  • Fujitsu MHN2100AT | Manual/User Guide - Page 200
    Interface 5.6.3.10 Host terminating an Ultra DMA data out burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes. DMARQ tLI (device) tMLI DMACK- (host) tLI tSS STOP (host) tLI DDMARDY(device) tACK tIORDYZ HSTROBE (host) DD(15:0) (host) DA0, DA1, DA2 CS0-, CS1
  • Fujitsu MHN2100AT | Manual/User Guide - Page 201
    5.6 Timing 5.6.3.11 Device terminating an Ultra DMA data in burst 5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes. DMARQ (device) DMACK(host) STOP (host) DDMARDY- (device) HSTROBE (host) DD(15:0) (host) tLI tRP tRFS tLI DA0, DA1, DA2, CS0-, CS1- tMLI tACK tIORDYZ
  • Fujitsu MHN2100AT | Manual/User Guide - Page 202
    BSY tM tN DASPtP *1: Reset means including Power-on-Reset, Hardware Reset (RESET-), and Software Reset. (2) Master and slave devices are present (2-drives configuration) [Master device] BSY DASP- [Slave device] BSY PDIAG- DASP- Clear Reset tN tP tR tQ tS Symbol Timing parameter tM Pulse
  • Fujitsu MHN2100AT | Manual/User Guide - Page 203
    CHAPTER 6 Operations 6.1 Device Response to the Reset 6.2 Power Save 6.3 Defect Management 6.4 Read-Ahead Cache 6.5 Write Cache C141-E120-02EN 6-1
  • Fujitsu MHN2100AT | Manual/User Guide - Page 204
    Operations 6.1 Device Response to the Reset This section describes how the PDIAG- and DASP- signals responds when the power of the IDD is turned on or the IDD receives a reset or diagnostic command. 6.1.1 Response to power-on After the master device (device 0) releases its own power-on reset state,
  • Fujitsu MHN2100AT | Manual/User Guide - Page 205
    Master device Power On Reset- Status Reg. BSY bit Slave device Power On Reset- BSY bit PDIAGDASP- Power on 6.1 Device Response to the Reset Max. 31 sec. Checks DASP- for up to 450 ms. If presence of a slave device is confirmed, PDIAG- is checked for up to 31 seconds. Max. 1 ms. Max. 30 sec.
  • Fujitsu MHN2100AT | Manual/User Guide - Page 206
    Operations After the slave device receives the hardware reset, the slave device shall report its presence and the result of the self-diagnostics to the master device as described below: DASP- signal: Asserted within 400 ms. PDIAG- signal: Negated within 1 ms and asserted within 30 seconds.
  • Fujitsu MHN2100AT | Manual/User Guide - Page 207
    6.1 Device Response to the Reset 6.1.3 Response to software reset The master device does not check the DASP- signal for a software reset. If a slave device is present, the master device checks the PDIAG- signal for up to 15 seconds to see if the slave device has completed the self-diagnosis
  • Fujitsu MHN2100AT | Manual/User Guide - Page 208
    Operations 6.1.4 Response to diagnostic command When the master device receives an EXECUTE DEVICE DIAGNOSTIC command and the slave device is present, the master device checks the PDIAGsignal for up to 6 seconds to see if the slave device has completed the selfdiagnosis successfully. The master
  • Fujitsu MHN2100AT | Manual/User Guide - Page 209
    6.2 Power Save 6.2 Power Save The host can change the power consumption state of the device by issuing a power command to the device. 6.2.1 Power save mode There are four types of power consumption state of the device including active mode where all circuits are active. In the power save mode, power
  • Fujitsu MHN2100AT | Manual/User Guide - Page 210
    the standby mode from the sleep mode. The only method to return from the standby mode is to execute a software or hardware reset. The drive enters the sleep mode under the following condition: • A SLEEP command is issued. Issued commands are invalid (ignored) in this mode. 6.2.2 Power commands The
  • Fujitsu MHN2100AT | Manual/User Guide - Page 211
    6.3 Defect Management 6.3 Defect Management Defective sectors of which the medium defect location is registered in the system space are replaced with spare sectors in the formatting at the factory shipment. All the user space area are formatted at shipment from the factory based on the default
  • Fujitsu MHN2100AT | Manual/User Guide - Page 212
    Operations 0 1 2 3 4 5 6 7 657 658 659 0 1 2 3 (unused) 4 5 6 656 657 658 Note: If an access request to logical sector 4 is specified, the device accesses physical sector 5 instead of sector 4. Figure 6.5 Sector slip processing (2) Alternate cylinder assignment A defective sector
  • Fujitsu MHN2100AT | Manual/User Guide - Page 213
    6.4 Read-Ahead Cache Index Sector (Physical) 0 1 2 3 4 5 6 Cylinder 0 Defective sector Head 0 0 1 2 3 (unu4sed) 5 6 Sector (Logical) Alternate cylinder Head 0 Already assigned Defective sector is assigned to unassigned sector. 658 659 658 659 Notes: 1) 4 alternate cylinders
  • Fujitsu MHN2100AT | Manual/User Guide - Page 214
    can be transferred from the data buffer without accessing the disk medium. The host can thus access data at higher speed. 6.4.1 Data buffer configuration The drive has a 2 MB data buffer. The buffer is used by divided into three parts; for read/write commands, and for MPU work (see Figure 6.9). 2048
  • Fujitsu MHN2100AT | Manual/User Guide - Page 215
    SECTOR(S) − WRITE MULTIPLE − WRITE VERIFY SECTOR(S) 3) Caching operation is inhibited by the SET FEATURES command. 4) Issued command is terminated with an error. 5) Soft reset or hard reset occurs, or power is turned off. C141-E120-02EN 6-13
  • Fujitsu MHN2100AT | Manual/User Guide - Page 216
    Operations 6) The device enters the sleep mode. 7) Under the state that the write data is kept in the data buffer for write command as a caching data, new write command is issued. (write data kept until now are invalidated) 6.4.3 Usage of read segment This subsection explains the usage of the read
  • Fujitsu MHN2100AT | Manual/User Guide - Page 217
    received command is a sequential command and performs the read-ahead operation after reading the requested data. 1) At receiving the sequential read command, the disk drive sets the DAP and HAP to the start address of the segment and reads the requested data from the load of the segment. HAP Mis
  • Fujitsu MHN2100AT | Manual/User Guide - Page 218
    data Mis-hit data Empty area DAP 3) After completion of the reading and transferring the requested data to the host system, the disk drive performs the read-ahead operation continuously. HAP (Completion of transferring requested data) Requested data Read-ahead data Empty area DAP 4) The disk
  • Fujitsu MHN2100AT | Manual/User Guide - Page 219
    follows at receiving a read command; HAP (Continued from the previous read request data) Read-ahead data Hit data DAP Last LBA Start LBA 2) The disk drive starts the read-ahead operation to the empty area that becomes vacant by data transfer at the same time as the disk
  • Fujitsu MHN2100AT | Manual/User Guide - Page 220
    data is stored. After completion of command, a previously existed cache data before the full hit reading are still kept in the buffer, and the disk drive does not perform the readahead operation. 1) In the case that the contents of the data buffer is as follows for example and the previous command
  • Fujitsu MHN2100AT | Manual/User Guide - Page 221
    of the hit data corresponding to the lead sector of the requested data, and reads remaining requested data from the disk media directly. The disk drive does not perform the read-ahead operation after data transfer. Following is an example of partially hit to the cache data. Cache data Start LBA
  • Fujitsu MHN2100AT | Manual/User Guide - Page 222
    data Start LBA Last LBA 6.5 Write Cache The write cache function of the drive makes a high speed processing in the case that data to be written by hard reset or soft reset is received or the write cache function is disabled by the SET FEATURES command during unwritten data is kept, the instruction
  • Fujitsu MHN2100AT | Manual/User Guide - Page 223
    6.5 Write Cache The drive uses a cache data of the last write command as a read cache data. When a read command is issued to the same address after the write command (
  • Fujitsu MHN2100AT | Manual/User Guide - Page 224
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  • Fujitsu MHN2100AT | Manual/User Guide - Page 225
    use of the physical specifications of these drivers. To make the best use of these drives, a BIOS that can handle the standard parameters of these drives is required. Command Commands are instructions to input data to and output data from a drive. Commands are written in command registers. Data
  • Fujitsu MHN2100AT | Manual/User Guide - Page 226
    time (total power-on time) by the number of failures in the disk drive during operation. MTTR Mean time to repair. The MTTR is the average time required for a service person to diagnose and repair a faulty drive. PIO (Programmed input-output) Mode to transfer data under control of the host
  • Fujitsu MHN2100AT | Manual/User Guide - Page 227
    is a piece of one-byte information posted from the drive to the host when command execution is ended. The status indicates the command termination state. Voice coil motor. The voice coil motor is excited by one or more magnets. In this drive, the VCM is used to position the heads accurately and
  • Fujitsu MHN2100AT | Manual/User Guide - Page 228
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  • Fujitsu MHN2100AT | Manual/User Guide - Page 229
    fault E ECC Error checking and correction ER Error register ERR Error F FR Feature register H HA Host adapter HDD Hard disk drive I IDNF ID not found IRQ14 Interrupt request 14 L LED Light emitting diode MB MB/S MPU M Mega-byte Mega-byte per seconds Micro processor unit P PCA
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  • Fujitsu MHN2100AT | Manual/User Guide - Page 231
    regarding this manual. Manual code C141-E120-02EN Manual name MHN2300AT, MHN2200AT, MHN2150AT, MHN2100AT DISK DRIVES PRODUCT MANUAL Please below. We will use your comments in planning future editions. Address: Fujitsu Learning Media Limited 22-7 Minami-Ooi 6-Chome Shinagawa-Ku Tokyo 140-0013
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  • Fujitsu MHN2100AT | Manual/User Guide - Page 233
    MHN2300AT, MHN2200AT, MHN2150AT, MHN2100AT DISK DRIVES PRODUCT MANUAL C141-E120-02EN MHN2300AT, MHN2200AT, MHN2150AT, MHN2100AT DISK DRIVES PRODUCT MANUAL C141-E120-02EN
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  • Fujitsu MHN2100AT | Manual/User Guide - Page 236
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C141-E120-02EN
MHN2300AT, MHN2200AT,
MHN2150AT, MHN2100AT
DISK DRIVES
PRODUCT MANUAL