Intel 925 Data Sheet - Page 103

DMIBAR Registers-Direct Media Interface (DMI) RCRB R 7.1.6 DMIVC0RCTL0-DMI VC0 Resource Control MMIO Range: Address Offset: Default Value: Access: Size: DMIBAR 014h 8000007Fh R/W, RO 32 bits This register controls the resources associated with PCI Express Virtual Channel 0. Bit 31 30:27 26:24 23:20 19:17 16 15:8 7:1 0 Access & Default Description RO 1b RO 000b R/W 0h RO 0b R/W 7Fh Virtual Channel Enable (EN): Enables the VC when set. Disables the VC when cleared. Reserved Virtual Channel Identifier (ID): Indicates the ID to use for this virtual channel. Reserved Port Arbitration Select (PAS): Indicates which port table is being programmed. The root complex takes no action on this setting since the arbitration is fixed and there is no arbitration table. Load Port Arbitration Table (LAT): The root complex does not implement an arbitration table for this virtual channel. Reserved Transaction Class / Virtual Channel Map (TVM): This field indicates which transaction classes are mapped to this virtual channel. When a bit is set, this transaction class is mapped to the virtual channel. Reserved Intel® 82925X/82925XE MCH Datasheet 103