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Intel DG33TL Product Specification - Page 73

Error Messages and Beep Codes, POST Code, Description of POST Operation

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Error Messages and Beep Codes Table 38. Port 80h POST Codes (continued) POST Code Description of POST Operation DXE Drivers E7 Waiting for user input E8 Checking password E9 Entering BIOS setup EB Calling Legacy Option ROMs Runtime Phase/EFI OS Boot F4 Entering Sleep state F5 Exiting Sleep state F8 EFI boot service ExitBootServices ( ) has been called F9 EFI runtime service SetVirtualAddressMap ( ) has been called FA EFI runtime service ResetSystem ( ) has been called PEIMs/Recovery 30 Crisis Recovery has initiated per user request 31 Crisis Recovery has initiated by software (corrupt flash) 34 Loading recovery capsule 35 Handing off control to the recovery capsule 3F Unable to recover 73

Section	Page
Intel® Desktop Board DG33TL Technical Product Specification	1
Revision History / Disclaimer	2
Preface	3
Intended Audience	3
What This Document Contains	3
Typographical Conventions	3
Contents	5
1 Product Description	9
1.1 Overview	10
1.1.1 Feature Summary	10
1.1.2 Board Layout	12
1.1.3 Block Diagram	14
1.2 Legacy Considerations	15
1.3 Online Support	15
1.4 Processor	15
1.5 System Memory	16
1.5.1 Memory Configurations	17
1.6 Intel® G33 Express Chipset	19
1.6.1 Intel G33 Graphics Subsystem	19
1.6.2 Intel® Viiv™ Processor Technology	21
1.6.3 USB	21
1.6.4 Serial ATA Interfaces	22
1.7 Parallel IDE Controller	23
1.8 Real-Time Clock Subsystem	23
1.9 Legacy I/O Controller	24
1.9.1 Consumer Infrared (CIR)	24
1.9.2 Serial Port	24
1.10 Audio Subsystem	25
1.10.1 Audio Subsystem Software	26
1.10.2 Audio Connectors and Headers	26
1.11 LAN Subsystem	27
1.11.1 Intel® 82566DC Gigabit Ethernet Controller	27
1.11.2 LAN Subsystem Software	28
1.11.3 RJ-45 LAN Connector with Integrated LEDs	28
1.12 Hardware Management Subsystem	29
1.12.1 Hardware Monitoring and Fan Control	29
1.12.2 Fan Monitoring	29
1.12.3 Chassis Intrusion and Detection	29
1.12.4 Thermal Monitoring	30
1.13 Power Management	31
1.13.1 ACPI	31
1.13.2 Hardware Support	34
2 Technical Reference	39
2.1 Memory Map	39
2.1.1 Addressable Memory	39
2.2 Connectors and Headers	42
2.2.1 Back Panel Connectors	43
2.2.2 Component-side Connectors and Headers	44
2.3 Jumper Block	53
2.4 Mechanical Considerations	54
2.4.1 Form Factor	54
2.5 Electrical Considerations	55
2.5.1 Power Supply Considerations	55
2.5.2 Fan Header Current Capability	55
2.5.3 Add-in Board Considerations	56
2.6 Thermal Considerations	56
2.7 Reliability	58
2.8 Environmental	58
3 Overview of BIOS Features	59
3.1 Introduction	59
3.2 BIOS Flash Memory Organization	60
3.3 Resource Configuration	60
3.3.1 PCI* Autoconfiguration	60
3.3.2 PCI IDE Support	61
3.4 System Management BIOS (SMBIOS)	61
3.5 Legacy USB Support	62
3.6 BIOS Updates	63
3.6.1 Language Support	63
3.6.2 Custom Splash Screen	63
3.7 BIOS Recovery	64
3.8 Boot Options	65
3.8.1 CD-ROM Boot	65
3.8.2 Network Boot	65
3.8.3 Booting Without Attached Devices	65
3.8.4 Changing the Default Boot Device During POST	65
3.9 Adjusting Boot Speed	66
3.9.1 Peripheral Selection and Configuration	66
3.9.2 BIOS Boot Optimizations	66
3.10 BIOS Security Features	67
4 Error Messages and Beep Codes	69
4.1 Speaker	69
4.2 BIOS Beep Codes	69
4.3 BIOS Error Messages	69
4.4 Port 80h POST Codes	70
5 Regulatory Compliance and Battery Disposal Information	75
5.1 Regulatory Compliance	75
5.1.1 Safety Standards	75
5.1.2 European Union Declaration of Conformity Statement	76
5.1.3 Product Ecology Statements	78
5.1.4 EMC Regulations	82
5.1.5 Product Certification Markings (Board Level)	84