Intel DG33TL Product Specification - Page 74
Table 39. Typical Port 80h POST Sequence - bios reset
 |
View all Intel DG33TL manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 74 highlights
Intel Desktop Board DG33TL Technical Product Specification Table 39. Typical Port 80h POST Sequence POST Code Description 21 Initializing a chipset component 22 Reading SPD from memory DIMMs 23 Detecting presence of memory DIMMs 25 Configuring memory 28 Testing memory 34 Loading recovery capsule E4 Entered DXE phase 12 Starting application processor initialization 13 SMM initialization 50 Enumerating PCI busses 51 Allocating resourced to PCI bus 92 Detecting the presence of the keyboard 90 Resetting keyboard 94 Clearing keyboard input buffer 95 Keyboard Self Test EB Calling Video BIOS 58 Resetting USB bus 5A Resetting PATA/SATA bus and all devices 92 Detecting the presence of the keyboard 90 Resetting keyboard 94 Clearing keyboard input buffer 5A Resetting PATA/SATA bus and all devices 28 Testing memory 90 Resetting keyboard 94 Clearing keyboard input buffer E7 Waiting for user input 01 INT 19 00 Ready to boot 74
-
1 -
2
-
3
-
4
-
5
-
6
-
7
-
8
-
9
-
10
-
11
-
12
-
13
-
14
-
15
-
16
-
17
-
18
-
19
-
20
-
21
-
22
-
23
-
24
-
25
-
26
-
27
-
28
-
29
-
30
-
31
-
32
-
33
-
34
-
35
-
36
-
37
-
38
-
39
-
40
-
41
-
42
-
43
-
44
-
45
-
46
-
47
-
48
-
49
-
50
-
51
-
52
-
53
-
54
-
55
-
56
-
57
-
58
-
59
-
60
-
61
-
62
-
63
-
64
-
65
-
66
-
67
-
68
-
69 -
70 -
71 -
72 -
73 -
74 -
75 -
76 -
77 -
78 -
79 -
80
-
81
-
82
-
83
-
84
-
85
-
86
-
87
-
88
 |
 |
