Intel SE7525GP2 Product Specification

Intel SE7525GP2 Manual

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  • Intel SE7525GP2 | Product Specification - Page 1
    Intel® Server Boards SE7320SP2 and SE7525GP2 Technical Product Specification Intel reference number D24635-004 Revision 4.0 December, 2005 Enterprise Platforms and Services Division - Marketing
  • Intel SE7525GP2 | Product Specification - Page 2
    Revision History Intel® Server Boards SE7320SP2 and SE7525GP2 Revision History Date June 2004 November 2004 September 2005 December 2005 Revision Number Modifications 1.0 Initial Release 2.0 Updated and clarified memory support, removed LX SKU references, added MTBF calculations, performed
  • Intel SE7525GP2 | Product Specification - Page 3
    Control Sensor 15 3.1.10 Processor Thermal Trip Shutdown 15 3.1.11 Processor IERR ...15 3.2 Intel® E7320 Chipset (Intel® Server Board SE7320SP2 15 3.2.1 3.3 Memory Controller Hub (MCH 16 Intel® E7525 Chipset (Intel® Server Board SE7525GP2 17 3.3.1 3.4 Memory Controller Hub (MCH 18
  • Intel SE7525GP2 | Product Specification - Page 4
    Contents Intel® Server Boards SE7320SP2 and SE7525GP2 3.4.7 Universal Serial Bus (USB) Controller 21 3.4.8 RTC ...21 3.4.9 GPIO...21 3.4.10 Enhanced Power Management 22 3.4.11 System Management Bus (SMBus 2.0 22 3.5 Memory Sub-System 22 3.5.1 Memory Sizing ...22 3.5.2 3.5.3 Memory
  • Intel SE7525GP2 | Product Specification - Page 5
    Intel® Server Boards SE7320SP2 and SE7525GP2 Contents 4.3.3 Configuration Reset 60 4.3.4 Keyboard Commands 61 4.4 Entering BIOS Setup 62 4.4.1 Main Menu ...62 4.4.2 Advanced Menu...63 4.4.3 Boot Menu ...73 4.4.4 Security Menu...75 4.4.5 Server Menu ...76 4.4.6 Exit Menu...81 4.5
  • Intel SE7525GP2 | Product Specification - Page 6
    Contents Intel® Server Boards SE7320SP2 and SE7525GP2 5.1.4 Private Wake On LAN / Power On LAN and Magic Packet Support 107 5.2.7 Watchdog Timer 108 5.2.8 System Event Log (SEL Codes 129 6.2.1 POST Error Codes and Messages 129 6.2.2 Boot Block Error Beep Codes 132 6.2.3 POST Error Beep
  • Intel SE7525GP2 | Product Specification - Page 7
    Intel® Server Boards SE7320SP2 and SE7525GP2 Contents 6.3 Checkpoints ...133 6.3.1 System ROM BIOS Memory Error Codes 140 Intel® Light-Guided Diagnostics 140 7. Connector Definitions and Pin-outs 141 7.1 Main Power Connector 141 7.2 Memory Module Connector 142 7.3 Processor Socket
  • Intel SE7525GP2 | Product Specification - Page 8
    Board SE7320SP2 Block Diagram 8 Figure 4. Intel® Server Board SE7525GP2 Block Diagram 9 Figure 5. CEK Processor Mounting 11 Figure 6. DIMM Socket Configuration 24 Figure 7. Interrupt Routing (Intel® 6300ESB Internal 34 Figure 8. Interrupt Routing ...35 Figure 9. Intel® Xeon® Processor Memory
  • Intel SE7525GP2 | Product Specification - Page 9
    ® Server Board SE7320SP2 Layout Reference 4 Table 2. Intel® Server Board SE7525GP2 Layout Reference 7 Table 3. Processor Support Matrix 12 Table 4. Supported DDR-266 DIMM Populations 24 Table 5. Supported DDR-333 DIMM Populations 25 Table 6. DIMM Module Capacities 25 Table 7. Possible Memory
  • Intel SE7525GP2 | Product Specification - Page 10
    Intel® Server Boards SE7320SP2 and SE7525GP2 Table 23. BIOS Setup, Advanced Menu Options 63 Table 24. BIOS Setup, Processor Configuration Sub-menu Options 63 Table 25. BIOS Setup IDE Configuration Menu Options 65 Table 26. Mixed PATA-SATA Configuration with only Primary PATA 66 Table 27. BIOS
  • Intel SE7525GP2 | Product Specification - Page 11
    Intel® Server Boards SE7320SP2 and SE7525GP2 Contents Table 58. Built-in Platform Sensors 122 Table 59. External Platform Sensors 123 Table 60. POST Error Messages and Handling 129 Table 61. Boot Block Error Beep Codes 132 Table 62. POST Error Beep Codes 132 Table 63. Troubleshooting BIOS
  • Intel SE7525GP2 | Product Specification - Page 12
    Contents Intel® Server Boards SE7320SP2 and SE7525GP2 Table 93. Three-pin Fan Headers Pin-out BIOS Bank Jumper Option 160 Table 99. Absolute Maximum Ratings 161 Table 100. MTBF Calculation 161 Table 101. Intel® Xeon® Processor DP TDP Guidelines 162 Table 102. Power Supply Voltage Specification
  • Intel SE7525GP2 | Product Specification - Page 13
    Intel® Server Boards SE7320SP2 and SE7525GP2 Introduction 1. Introduction This Technical Product Specification (TPS) provides detail to the architecture and feature set of the Intel® Server Board SE7320SP2 and the Intel® Server Board SE7525GP2. Unless otherwise noted, features discussed in this
  • Intel SE7525GP2 | Product Specification - Page 14
    of the features is listed below. 2.1.1 Intel® Server Board SE7320SP2 Feature Set Dual processor slots supporting Intel® Xeon® processors operating at 800MT/s system bus Intel® E7320 chipset (MCH, 6300ESB) Four DIMM slots supporting DDR 266/333 MHz memory Single Intel® 82541 10/100/1000 Network
  • Intel SE7525GP2 | Product Specification - Page 15
    Intel® Server Boards SE7320SP2 and SE7525GP2 Server Board Overview The following figure shows the board layout of the Intel® Server Board SE7320SP2. Each connector and major component is identified by number and identified in Table 1. 11 19 14 15 10 13 12 1 8 9 8 7 1 17 6 5 2 1 4 3
  • Intel SE7525GP2 | Product Specification - Page 16
    as well as an entry-server environment. 2.2.1 Intel® Server Board SE7525GP2 Feature Set ƒ Dual processor slots supporting Intel® Xeon® processors operating on the 800MT/s system bus ƒ Intel® E7525 chipset (MCH, ICH5R) ƒ Four DIMM slots supporting DDR-266/333 MHz memory ƒ One Intel® 82541 10/100
  • Intel SE7525GP2 | Product Specification - Page 17
    ƒ Two 64-bit / 66-MHz PCI-X* connectors ƒ Intel® Light-Guided Diagnostics on most FRU devices (processors, memory) ƒ Port-80 diagnostic LEDs displaying POST Codes The following figure shows the board layout of the Intel® Server Board SE7525GP2. Each connector and major component is identified by
  • Intel SE7525GP2 | Product Specification - Page 18
    Server Board Overview 11 19 13 12 1 Intel® Server Boards SE7320SP2 and SE7525GP2 14 15 10 8 9 8 20 7 1 17 6 5 2 1 4 3 1 Figure 2. Intel® Server Board SE7525GP2 Layout 6 Revision 4.0
  • Intel SE7525GP2 | Product Specification - Page 19
    Intel® Server Boards SE7320SP2 and SE7525GP2 Server Board Overview Ref # 1 2 3 4 5 6 7 8 9 10 Table 2. Intel® Server Board SE7525GP2 Layout Reference Description Processor sockets Ref # 11 DIMM connectors (from left to right 2A, 2B, 1A, 1B) 12 Two external USB connectors 13 Keyboard and
  • Intel SE7525GP2 | Product Specification - Page 20
    make up the server boards. Note: Due to the similarities between these two products, this chapter discusses all features that are present on both products. Where appropriate, features that are specific to one product or the other will noted. Figure 3. Intel® Server Board SE7320SP2 Block Diagram
  • Intel SE7525GP2 | Product Specification - Page 21
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture Figure 4. Intel® Server Board SE7525GP2 Block Diagram 3.1 Processor Sub-system The support circuitry for the processor sub-system consists of the following: ƒ Dual 604-pin zero insertion force (ZIF) processor sockets ƒ Processor
  • Intel SE7525GP2 | Product Specification - Page 22
    Boards SE7320SP2 and SE7525GP2 3.1.1 Processor Voltage Regulator Devices (VRDs) The server board has two voltage regulator devices (VRDs) that provide the appropriate voltages to the installed processors. Each VRD is compliant with the VRD 10.1 specification and is designed to support Intel® Xeon
  • Intel SE7525GP2 | Product Specification - Page 23
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture 3.1.5 Common Enabling Kit (CEK) Design Support The server board has been designed to comply with Intel's common enabling kit (CEK) processor mounting and heatsink retention solution. The server board will ship with a CEK spring
  • Intel SE7525GP2 | Product Specification - Page 24
    new Intel® Xeon® processors supported on these server boards. See the Supported Processors List located on the support website for a complete list of supported processors. http://support.intel.com/support/motherboards/server/se7320sp2 http://support.intel.com/support/motherboards/server/se7525gp2
  • Intel SE7525GP2 | Product Specification - Page 25
    , all processors not capable of speeds supported by the boot strap processor (BSP) are disabled and an error is displayed. 3.1.6.7 Microcode IA-32 processors have the capability of correcting specific errata through the loading of an Intel supplied data block, i.e., microcode update. The BIOS is
  • Intel SE7525GP2 | Product Specification - Page 26
    Functional Architecture Intel® Server Boards SE7320SP2 and SE7525GP2 3.1.6.9 Hyper-Threading Technology Intel® Xeon® processors support Hyper-Threading Technology. The BIOS detects processors that support this feature and enables the feature during POST. The BIOS Setup utility provides an option
  • Intel SE7525GP2 | Product Specification - Page 27
    , the mBMC generates a processor IERR event. 3.2 Intel® E7320 Chipset (Intel® Server Board SE7320SP2) The architecture of the Intel® Server Board SE7320SP2 is designed around the Intel® E7320 chipset. The Intel® Server Board SE7525GP2 is designed around the Intel® E7525 chipset. This is discussed
  • Intel SE7525GP2 | Product Specification - Page 28
    configuration is 12 GB. On the Intel® Server Board SE7320SP2, the maximum supported memory size at DDR266 or DDR333 is 8 GB. DDR2-400 memory is not supported on this server board. There are several RASUM (reliability, availability, serviceability, usability, and manageability) features built into
  • Intel SE7525GP2 | Product Specification - Page 29
    controller is discussed in further detail later in this document. 3.3 Intel® E7525 Chipset (Intel® Server Board SE7525GP2) The architecture of the Server Board SE7525GP2 is designed around the Intel® E7525 chipset. The Server Board SE7320SP2 is designed around the E7320 chipset and was discussed in
  • Intel SE7525GP2 | Product Specification - Page 30
    Server Board SE7525GP2, the maximum supported memory size at DDR266 or DDR333 is 8 GB. DDR2-400 memory is not supported on this server board. There are several RASUM (reliability, availability, serviceability, usability, and manageability) features built into the Intel E7525 MCH memory interface
  • Intel SE7525GP2 | Product Specification - Page 31
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture 3.3.1.3 PCI Express* The Intel® E7525 MCH is part of the first family of Intel chipsets to support the PCI Express* high speed serial I/O interface for high I/O bandwidth. The Intel E7525 MCH implementation of the scalable PCI
  • Intel SE7525GP2 | Product Specification - Page 32
    Intel® Server Boards SE7320SP2 and SE7525GP2 3.4.1 PCI Interface The Intel® 6300ESB I/O controller PCI interface provides a 33-MHz, Revision 2.3-compliant implementation. All PCI signals are 5-V tolerant, except for PME#. The Intel 6300ESB I/O controller integrates a PCI arbiter that supports
  • Intel SE7525GP2 | Product Specification - Page 33
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture REQ#/GNT# pairs. LPC DMA is handled through the use of the LDRQ# lines from peripherals and special encoding on LAD[3:0] from the host. Single, Demand, Verify, and Increment modes are supported on the LPC interface. Channels 0-3
  • Intel SE7525GP2 | Product Specification - Page 34
    Functional Architecture Intel® Server Boards SE7320SP2 and SE7525GP2 3.4.10 Enhanced Power Management The Intel® 6300ESB I/O controller power management functions include enhanced clock control, local and global monitoring support for 14 individual devices, and various low-power (suspend) states
  • Intel SE7525GP2 | Product Specification - Page 35
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture See the Tested Memory List on the support website for a list of supported memory: http://support.intel.com/support/motherboards/server/se7320sp2 http://support.intel.com/support/motherboards/server/se7525gp2 The BIOS reads the
  • Intel SE7525GP2 | Product Specification - Page 36
    Functional Architecture Intel® Server Boards SE7320SP2 and SE7525GP2 The following diagram identifies the memory bank locations on the server board. Figure 6. DIMM Socket Configuration The following tables show supported memory populations. Table identifiers: ƒ S/R = single rank ƒ D/R = dual
  • Intel SE7525GP2 | Product Specification - Page 37
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture Table 5. Supported DDR-333 DIMM Populations DIMM Slot A2 E S/R E D/R D/R BIOS, APIC configuration space, PCI adapter interface, and virtual video memory space. This means that if 4 GB of memory is installed, 3.5 GB of this memory
  • Intel SE7525GP2 | Product Specification - Page 38
    Architecture Intel® Server Boards SE7320SP2 and SE7525GP2 3.5.4 Disabling DIMMs The BIOS provides a mechanism to disable a DIMM if it is detected to be faulty. A faulty DIMM is defined to have either multiple correctable errors or a single uncorrectable error on a single DIMM. Memory errors
  • Intel SE7525GP2 | Product Specification - Page 39
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture Table 8. Suggested SEC Threashold Prescale Settings the DIMM in socket 1A 256 MB BIOS. 3.5.5 Memory RASUM Features The Intel® E7320 MCH and Intel E7525 MCH support several memory RASUM (Reliability, Availability, Serviceability
  • Intel SE7525GP2 | Product Specification - Page 40
    Intel® Server Boards SE7320SP2 and SE7525GP2 3.5.5.1 DRAM ECC - Intel® supported during single-channel operation outside of DIMM mirroring fail-down because it does have significant performance impacts in that environment. 3.5.5.2 Integrated Memory Scrub Engine The Intel® E7320 and Intel E7525
  • Intel SE7525GP2 | Product Specification - Page 41
    ® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture Note that any given read request will only be retried a single time on behalf of this error detection mechanism. If the uncorrectable error is repeated it will be logged and escalated as directed by device configuration. In the memory
  • Intel SE7525GP2 | Product Specification - Page 42
    Intel® Server Boards SE7320SP2 and SE7525GP2 requires that the spare DIMM be at least the size of the largest primary DIMM in use.) The MCH will also begin tracking the progress of its built-in memory off-line. This mechanism requires no software support once it has been programmed and enabled,
  • Intel SE7525GP2 | Product Specification - Page 43
    : x16 PCI Express bus segment Intel® Server Board SE7525GP2 only: The P64-Express16 bus segment supports x16 PCI Express signaling. 3.6.1.5 Scan Order The BIOS assigns PCI bus numbers in a depth-first hierarchy, in accordance with the PCI Local Bus Specification. When a bridge device is located
  • Intel SE7525GP2 | Product Specification - Page 44
    Intel® Server Boards SE7320SP2 and SE7525GP2 3.6.1.9 PCI APIs The system BIOS supports the INT 1Ah, AH = B1h functions as defined in the PCI BIOS Specification. The system BIOS supports the real mode interfaces and does not support the protected mode interfaces. 3.6.2 Split Option ROM The BIOS
  • Intel SE7525GP2 | Product Specification - Page 45
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture compatibility interrupt sources. The I/O APICs can also supply greater than 16 interrupt levels to the processor the 6300ESB to the processors. 3.6.3.4 Serialized IRQ Support The server boards support a serialized interrupt
  • Intel SE7525GP2 | Product Specification - Page 46
    Functional Architecture Intel® Server Boards SE7320SP2 and SE7525GP2 IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 ICH 8259PIC X8 connector MCH X16 PCI-E interface (Supported by SE7525GP2 only) X16 Connector INTR CPU1 CPU2 INTR Figure 7. Interrupt Routing (Intel® 6300ESB Internal) 34 Revision 4.0
  • Intel SE7525GP2 | Product Specification - Page 47
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture Intel 6300ESB ICH Interrupt Routing PCI Interface Serialized IRQ Interface Timer Super I/O Keyboard Cascade Serial Port2/ISA Serial Port1/ISA ISA Floppy/ISA ISA RTC SCI/
  • Intel SE7525GP2 | Product Specification - Page 48
    Architecture Intel® Server Boards SE7320SP2 and SE7525GP2 3.6.4 IDE Support Integrated IDE controllers of the Intel® 6300ESB I/O controller provide two independent IDE channels, each capable of supporting up to two drives. Both channels provide a standard 40-pin IDE connector on the server board
  • Intel SE7525GP2 | Product Specification - Page 49
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture 3.6.5.1 SATA RAID The Intel® RAID Technology solution, available with the Intel 6300ESB I/O controller, offers data stripping for higher performance (RAID Level 0) or data mirroring for better data protection (RAID 1). There is
  • Intel SE7525GP2 | Product Specification - Page 50
    Functional Architecture Intel® Server Boards SE7320SP2 and SE7525GP2 3.6.6.1 Video Modes The Rage* XL chip supports all standard IBM* VGA modes. The following table shows the 2D/3D modes supported for both CRT and LCD. 2D Mode 640x480 800x600 1024x768 1280x1024 1280x1024 1600x1200 1600x1200 3D
  • Intel SE7525GP2 | Product Specification - Page 51
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture The server boards support an 8-MB (512 KB x 32-bit x four banks) SDRAM device for video memory. The following table shows the video memory interface signals: Table 14. Video Memory Interface Signal Name CAS# CKE CS#[1..0] DQM
  • Intel SE7525GP2 | Product Specification - Page 52
    Intel® Server Boards SE7320SP2 and SE7525GP2 3.6.8 USB 2.0 Support The USB controller functionality integrated into Intel® 6300ESB I/O controller provides the server board with the interface for up to four USB 2.0 ports. Two external connectors are located on the back edge of the server board
  • Intel SE7525GP2 | Product Specification - Page 53
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture 3.6.9.1 GPIOs The National Semiconductor* PC87427 Super I/O provides nine general-purpose input/output pins that the SE7320SP2 and Server Board SE7525GP2 LM30. Selects BIOS flash bank (A21 bit) for rolling BIOS feature. HFCKOUT-
  • Intel SE7525GP2 | Product Specification - Page 54
    Architecture Intel® Server Boards SE7320SP2 and SE7525GP2 3.6.9.2 Serial Ports Both the SE7320SP2 and Server Board SE7525GP2 provide two edge of the server board, are provided for keyboard and mouse support. Either port can support a mouse or keyboard. Neither port supports "hot plugging"
  • Intel SE7525GP2 | Product Specification - Page 55
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture 3.6.10 BIOS Flash An Intel® 3-volt Advanced+ Boot Block 28F320C3 Flash memory component is used as the BIOS flash device. The 28F320C3 is a high-performance 32-megabit memory component that provides 2048 K x 16 (4 MB) of BIOS
  • Intel SE7525GP2 | Product Specification - Page 56
    Functional Architecture Intel® Server Boards SE7320SP2 and SE7525GP2 Upper Memory Ranges Lo PCI Memory Space Range Main Memory Address Range Hi PCI Memory Address Range 64 GB Additional Main Memory Address Range 4 GB TSEG SMRAM S Top of Low Memory (TOLM) Optional ISA Hole 16MB 15MB 1MB
  • Intel SE7525GP2 | Product Specification - Page 57
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture 3.7.1.1 DOS Compatibility Region The first region of memory below 1 MB was 0BFFFFh 0A0000h 09FFFFh 080000h 07FFFFh 000000h System BIOS 1MB Extended System BIOS 960KB Add-in Card BIOS and Buffer Area 896KB PCI/ISA Video
  • Intel SE7525GP2 | Product Specification - Page 58
    Functional Architecture Intel® Server Boards SE7320SP2 and SE7525GP2 ƒ DOS Area The DOS region is 512 KB in the address range 0 to 07FFFFh. This region is fixed and all accesses go to main memory. ƒ ISA Window Memory The ISA Window Memory is 128 KB between the address of 080000h to 09FFFFh. This
  • Intel SE7525GP2 | Product Specification - Page 59
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture 3.7.1.2 Extended Memory Extended memory is defined as all address space greater than 1 MB. Extended Memory region covers 8 GB maximum of address space from addresses 0100000h to FFFFFFFh, as shown in the following figure. PCI
  • Intel SE7525GP2 | Product Specification - Page 60
    Functional Architecture Intel® Server Boards SE7320SP2 and SE7525GP2 ƒ Main Memory All installed memory greater than 1 MB is mapped to local main memory, up to 8 GB of physical memory. Memory between 1 MB to 15 MB is considered to be standard ISA extended memory. 1 MB of memory starting at 15 MB
  • Intel SE7525GP2 | Product Specification - Page 61
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture 3.7.1.4 System Management Mode Handling The chipset supports System Management Mode (SMM) operation in one of three modes. System Management RAM (SMRAM) provides code and data storage space for the SMI_L handler code, and is
  • Intel SE7525GP2 | Product Specification - Page 62
    Architecture Intel® Server Boards SE7320SP2 and SE7525GP2 3.7.2 I/O Map The server board I/O addresses to be mapped to the processor bus or through designated bridges in a multi-bridge system. Other PCI devices, including the Intel® 6300ESB I/O controller, have built-in features that support PC
  • Intel SE7525GP2 | Product Specification - Page 63
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture Address (es) 0074h 0076h 0071h 0073h 0075h 6::0) NMI Mask (bit 7) & RTC address (bits 6::0) RTC Data RTC Data RTC Data RTC Data BIOS Timer DMA Low Page Register DMA Low Page Register (aliased) System Control Port A (PC-AT control
  • Intel SE7525GP2 | Product Specification - Page 64
    CONFIG_ADDRESS Register Intel® Server Board SE7320SP2 Turbo and Reset Control PCI CONFIG_DATA Register Notes 3.7.3 Accessing Configuration Space All PCI devices contain PCI configuration space, accessed using mechanism #1 defined in the PCI Local Bus Specification. If dual processors are used
  • Intel SE7525GP2 | Product Specification - Page 65
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture 3.7.3.1 CONFIG_ADDRESS Register CONFIG_ADDRESS is 32 bits wide and contains the field format shown in the following figure. Bits [23::16] choose a specific bus in the system. Bits [15::11] choose a specific device on the
  • Intel SE7525GP2 | Product Specification - Page 66
    Functional Architecture Intel® Server Boards SE7320SP2 and SE7525GP2 PCI Device MCH EXP Bridge A1 MCH EXP (64-bit, PCI-X-100) LF Slot3 (64-bit, PCI-X-100) LP PCI-E x8 Slot1 Onboard device Intel® 82546GB (1Gb) NIC with dual-channel LSI 53C1030 Ultra 320 SCSI with dualchannel ATI Rage XL (PCI VGA
  • Intel SE7525GP2 | Product Specification - Page 67
    Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture 3.8 Clock Generation and Distribution All buses on the server board operate using synchronous clocks. Clock synthesizer/driver circuitry on the server board generates clock frequencies and voltage levels as required, including
  • Intel SE7525GP2 | Product Specification - Page 68
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4. System BIOS This section describes the functionality and features supported of the system Basic Input/Output System (BIOS), which is based on an AMI 8.0 core architecture. The BIOS is implemented as firmware that resides in Flash ROM. It
  • Intel SE7525GP2 | Product Specification - Page 69
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS During board development, the system BIOS will have a unique BIOS ID for the sever boards. The following is a sample data string that will be displayed during POST: SE7320SP2.86B.P.05.00.0028.10072004 SE7525GP2.86B.P.05.00.0028.10072004 4.2
  • Intel SE7525GP2 | Product Specification - Page 70
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.2.1.1 System State Window The top row of the screen is reserved for the system state window. On a graphics console, the window is 640x48. On a text
  • Intel SE7525GP2 | Product Specification - Page 71
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.2.1.5.1 Quiet Boot / OEM Splash Screen The BIOS implements Quiet Boot, providing minimal startup display during BIOS POST. System start-up must only draw the end user's attention in the event of errors or when there is a need for user
  • Intel SE7525GP2 | Product Specification - Page 72
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.3 BIOS Setup Utility The BIOS Setup utility is provided to perform system configuration changes and to display current settings and environment information. The BIOS Setup utility stores configuration settings in system non-volatile
  • Intel SE7525GP2 | Product Specification - Page 73
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.3.4 Keyboard Commands The Keyboard Command Bar supports the following: Table 21. BIOS If "OK" is selected and the Enter key is pressed, all Setup fields are set to their default values. If "Cancel" is selected and the Enter key is
  • Intel SE7525GP2 | Product Specification - Page 74
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.4 Entering BIOS Setup The BIOS Setup utility is accessed by pressing the hot-key during POST. Note: Some BIOS setup options are based on latest BIOS. If your server has an older BIOS, you may see some differences. 4.4.1 Main Menu
  • Intel SE7525GP2 | Product Specification - Page 75
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.4.2 Advanced Menu Table 23. BIOS Setup, Advanced Menu Options Feature Advanced Settings Options Help Text Description WARNING: Setting wrong values in below sections may cause system to malfunction. Processor Configuration N/A
  • Intel SE7525GP2 | Product Specification - Page 76
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 Feature Cache L3 Max CPUID Value Limit Options N/A Disabled Enabled Hyper-Threading Technology Disabled Enabled HT Technology in MPS Disabled Enabled Intel® SpeedStep™ Tech. Disabled Auto Execute Disable Bit Hardware Prefetcher
  • Intel SE7525GP2 | Product Specification - Page 77
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.4.2.2 IDE Configuration Sub-menu Table 25. BIOS SATA channels are reserved to be used as RAID. Defines priority between SATA channels. Lets set the SATA Port0 to third IDE Master channel & Port1 to fourth IDE Master channel. Otherwise set
  • Intel SE7525GP2 | Product Specification - Page 78
    Detect Time Out (Sec) ATA(PI) 80Pin Cable Detection 0 5 10 15 20 25 30 35 Host & Device Host Device Intel® Server Boards SE7320SP2 and SE7525GP2 Help Text While entering setup, BIOS auto detects the presence of IDE devices. This displays the status of auto detection of IDE devices. While entering
  • Intel SE7525GP2 | Product Specification - Page 79
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS Table 27. BIOS Setup, IDE Device Configuration Sub-menu support. The auto setting is correct in most cases. The auto setting is correct in most cases. The auto setting is correct in most cases. The auto setting is correct in most cases
  • Intel SE7525GP2 | Product Specification - Page 80
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 DMA Mode S.M.A.R.T. 32Bit Data Transfer Auto SWDMA0-0 SWDMA0-1 SWDMA0-2 MWDMA0 UltraDMAn The auto setting is correct in most cases. Self-Monitoring, analysis and reporting technology. The auto setting is correct in most cases. Enable /
  • Intel SE7525GP2 | Product Specification - Page 81
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.4.2.4 Super I/O Configuration Sub-menu Table 29. BIOS Setup, Super I/O Configuration Sub-menu Feature Options Help Text Configure National Semiconductor 42x Super I/O Chipset Serial Port A Address Disabled 3F8/IRQ4 Allows BIOS to
  • Intel SE7525GP2 | Product Specification - Page 82
    BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.4.2.6 USB Mass Storage Device Configuration Sub-menu Table 31. BIOS Setup as hard drive. Forced FDD option can be used to force a HDD formatted drive to boot as FDD (Ex. ZIP drive). Description Only displayed if a device is detected, includes
  • Intel SE7525GP2 | Product Specification - Page 83
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.4.2.7 PCI Configuration Sub-menu This sub-menu provides control over PCI devices and their option ROMs. If the BIOS is reporting POST error 146, use this menu to disable option ROMs that are not required to boot the system. Table 32.
  • Intel SE7525GP2 | Product Specification - Page 84
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.4.2.8 Memory Configuration Sub-menu This sub-menu provides information about the DIMMs detected by the BIOS. The DIMM number is printed on the server board next to each device. Table 33. BIOS Setup, Memory Configuration Sub-menu
  • Intel SE7525GP2 | Product Specification - Page 85
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.4.3 Boot Menu Table 34. BIOS Setup, Boot Menu Selections Feature Boot Settings Boot Settings Configuration Boot Device Priority Hard Disk Drives Removable Drives CD/DVD Drives Options Help Text N/A Configure settings during system
  • Intel SE7525GP2 | Product Specification - Page 86
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.4.3.2 Boot Device Priority Sub-menu Selections Table 36. BIOS Setup, Boot Device Priority Sub-menu Selections Feature Options Boot Device Priority 1st Boot Device Varies Nth Boot Device Varies Help Text Specifies the boot sequence
  • Intel SE7525GP2 | Product Specification - Page 87
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.4.3.2.3 ATAPI CD-ROM Drives Sub-menu Selections Table 39. BIOS Setup, CD/DVD Drives Sub-menu Selections Feature Options CD/DVD Drives 1st Drive Varies Nth Drive Varies Help Text Specifies the boot sequence from the available devices.
  • Intel SE7525GP2 | Product Specification - Page 88
    BIOS Secure Mode Timer Secure Mode Hot Key (Ctrl-Alt- ) 1 minute 2 minutes 5 minutes 10 minutes 20 minutes 60 minutes 120 minutes [L] [Z] Secure Mode Boot Disabled Enabled Front Panel Switch Disabled Inhibit Enabled NMI Control Disabled Enabled Intel® Server Boards SE7320SP2 and SE7525GP2
  • Intel SE7525GP2 | Product Specification - Page 89
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS Feature Resume on AC Power Loss FRB-2 Policy Late POST Timeout Hard Disk OS Boot Timeout PXE OS Boot Timeout OS Watchdog Timer Policy Platform Event Filtering Options Stays Off Power On Retry on Next Boot Disable FRB2 Timer Disabled 5
  • Intel SE7525GP2 | Product Specification - Page 90
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.4.5.1 System Management Sub-menu Selections Table 42. BIOS Setup, System Management Sub-menu Selections Feature System Management Options Help Text Description Server Board Part Number N/A N/A Server Board Serial Number N/A N/A
  • Intel SE7525GP2 | Product Specification - Page 91
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.4.5.3 Serial Console Features Sub-menu Selections Table 43. BIOS Setup, Serial Console Features Sub-menu Selections Feature Serial Console Features Options BIOS Redirection Port Disabled Serial A Serial B Help Text If enabled, BIOS
  • Intel SE7525GP2 | Product Specification - Page 92
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.4.5.4 Event Log Configuration Sub-menu Selections Table 44. BIOS Setup, Event Log Configuration Sub-menu Selections Feature Options Event Log Configuration Clear All Event Logs Disabled Enabled Clear Event Log When Full BIOS Event
  • Intel SE7525GP2 | Product Specification - Page 93
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.4.6 Exit Menu Table 45. BIOS support for the rolling single-boot BIOS update feature. The complete ROM is visible, starting at physical address 4 GB minus the size of the flash ROM device. The Flash Memory Update utility loads the BIOS
  • Intel SE7525GP2 | Product Specification - Page 94
    BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 The BIOS relies on specialized hardware and additional flash space to accomplish online update/rolling of the BIOS. To this end, the flash is divided into two partitions, primary and secondary. The active partition from which the system boots
  • Intel SE7525GP2 | Product Specification - Page 95
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS Where: ƒ /n don't check ROM ID ƒ Choose one: - /pb Program Boot Block - /pn Program NVRAM - /pc 4.7.1.3 Updating the BIOS from Linux ƒ Make sure that the flash disk contains the ROM image and the AFULNX utility. ƒ Boot to Linux and set up
  • Intel SE7525GP2 | Product Specification - Page 96
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.7.1.4 Updating the BIOS from the EFI Shell ƒ Make sure that the flash disk contains the ROM image and the AFUEFI utility. ƒ Boot to the EFI Shell with the flash disk. ƒ Do a map -r to retrieve the file system on the disk. ƒ Change to
  • Intel SE7525GP2 | Product Specification - Page 97
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.7.3.1 BIOS Recovery The BIOS has a ROM image size of 2 MB. A standard 1.44 MB floppy diskette cannot hold the entire ROM file due to the large file size. To compensate for this, a Multi-disk recovery method is available for BIOS recover
  • Intel SE7525GP2 | Product Specification - Page 98
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.7.3.2 Multi-disk Recovery The Multi-disk Recovery method is available to support ROM images greater than 1 MB when performing a BIOS recovery from multiple floppy disks. Do the following to perform a multi-disk BIOS recovery: 1. Use
  • Intel SE7525GP2 | Product Specification - Page 99
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS format. ƒ [/D] deletes the logo module from the ROM file. Supported formats are dependent on the ROM and include the following: ƒ 16 system. 4.7.4.1 Changing the OEM Logo for DOS 1. Boot to DOS. 2. Download OEMLOGOD.exe, Rombuild.exe,
  • Intel SE7525GP2 | Product Specification - Page 100
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.8 OEM Binary System customers can supply 16 KB of code and data for use during POST and at run-time. Individual platforms may support a larger user binary. User binary code is executed at several defined hook points during POST. The user
  • Intel SE7525GP2 | Product Specification - Page 101
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS fixed location. Upon entry into the user binary, DX contains a 'token' that points to the reserved bits. 4.9 Operating System Boot, Sleep, and Wake 4.9.1 Microsoft Windows* Compatibility Intel Corporation and Microsoft Corporation co-
  • Intel SE7525GP2 | Product Specification - Page 102
    BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 ƒ ACPI BIOS: This is the code that boots the machine and implements interfaces for sleep, wake, and some restart operations. The ACPI Description Tables are also provided by the ACPI BIOS. The BIOS supports processors are not executing, the BIOS
  • Intel SE7525GP2 | Product Specification - Page 103
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.9.5 On to Off (OS absent) The SCI interrupt is masked. The firmware polls the power button status bit in the ACPI hardware registers and sets state The platform supports the following Specification, the power button can always wake up the
  • Intel SE7525GP2 | Product Specification - Page 104
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 If an ACPI operating system is loaded, the following and administrator passwords are supported by the BIOS. To set a user password, an administrator password must be entered during system configuration using the BIOS setup menu. The maximum
  • Intel SE7525GP2 | Product Specification - Page 105
    Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.10.1 Operating Model The following table summarizes the operation of security features supported by the BIOS. Mode Secure boot Entry Method/ Event Power On/Reset Password Power on boot On/Reset Fixed disk Power boot sector On/Reset
  • Intel SE7525GP2 | Product Specification - Page 106
    System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 Scenario #1 Administrator Password Is Not Installed User Password Is Not Installed Login Type: N/A Set Admin Password (visible) Set User Password (visible) User Access Level [Full]** (shaded) Clear User Password (hidden) ** User
  • Intel SE7525GP2 | Product Specification - Page 107
    Intel® Server Boards SE7320SP2 and SE7525GP2 Platform Management 4.10.3 Password Clear Jumper If the user or administrator password(s) is lost or forgotten, moving the password clear jumper (J17) to the clear position will clear both passwords. The BIOS determines if the password clear jumper is
  • Intel SE7525GP2 | Product Specification - Page 108
    Intel® Server Boards SE7320SP2 and SE7525GP2 HECETA 7 VID_CPU0[5:0] P1_VID[5:0] VID_CPU1[5:0] P12NVo_tCUPsUe_dSCALED P12V_SCALED P_VT P1V Not Used P_VCCP0 P_VCCP1 PP53VV PD1DVR8_CSoCreSI DDR FANIN1 FA FANIN3 Chassis Security LED CHASSIS INTRUSION SECURE_MODE_KB PWR_LED Figure 13.
  • Intel SE7525GP2 | Product Specification - Page 109
    Intel® Server Boards SE7320SP2 and SE7525GP2 Platform Management 5.1.1 5V Standby The power supply must provide a 5V The IPMI specification defines a standardized, abstracted, message-based interface between software and the platform management subsystem, and a common set of messages
  • Intel SE7525GP2 | Product Specification - Page 110
    Intel® Server Boards SE7320SP2 and SE7525GP2 Platform Management Interface Specification. Most of reads the SDRs and based on bit settings, writes the threshold data. Then it system processor information, and other server board monitoring to the information, since issues with IPMB bus arbitration and
  • Intel SE7525GP2 | Product Specification - Page 111
    Intel® Server Boards SE7320SP2 and SE7525GP2 Platform Management 5.1.5 Mini-Baseboard Management Controller At the heart of platform management is a management controller. To support the onboard platform instrumentation management model, the server boards incorporate the National Semiconductor*
  • Intel SE7525GP2 | Product Specification - Page 112
    Platform Management Intel® Server Boards SE7320SP2 and SE7525GP2 The following are the common features supported by the mBMC. ƒ Power system ƒ System reset control ƒ System initialization ƒ Watchdog timer ƒ System event log ƒ Sensor data record (SDR) repository ƒ Field replaceable unit (FRU)
  • Intel SE7525GP2 | Product Specification - Page 113
    Intel® Server Boards SE7320SP2 and SE7525GP2 Platform Management 5.2 Onboard Platform Instrumentation Features and Functionality The National Semiconductor* PC87431 management controller is an Application Specific Integrated Circuit (ASIC) with many peripheral devices embedded into it. The mBMC
  • Intel SE7525GP2 | Product Specification - Page 114
    Platform Management Intel® Server Boards SE7320SP2 and SE7525GP2 5.2.1 mBMC Self-test The mBMC performs various tests the host through the slave SMBus interface. It interfaces with the LAN On Motherboard (LOM) and peripherals through the two independent master bus interfaces. 5.2.3 External
  • Intel SE7525GP2 | Product Specification - Page 115
    Intel® Server Boards SE7320SP2 and SE7525GP2 Platform Management 5.2.3.1 Private Management I2C set the password is supported. 5.2.4.3 Request/Response Protocol All of the protocols used in the host interface and the LOM interface are Request/Response protocols. A Request Message is issued
  • Intel SE7525GP2 | Product Specification - Page 116
    Platform Management Intel® Server Boards SE7320SP2 and SE7525GP2 5.2.4.4 Host to mBMC Communication Interface The host operations: ƒ Chassis control, e.g., get chassis status, reset chassis, power-up chassis, power-down chassis ƒ Get system sensor readings ƒ Get and Set system boot options ƒ
  • Intel SE7525GP2 | Product Specification - Page 117
    Intel® Server Boards SE7320SP2 and SE7525GP2 Platform Management In addition, the mBMC supports LAN alerting in the form of SNMP capabilities, including: ƒ Power on/off and reset control with the ability to set BIOS boot flags ƒ FRU, SDR, and SEL access ƒ BMC configuration access ƒ Remote
  • Intel SE7525GP2 | Product Specification - Page 118
    Platform Management Intel® Server Boards SE7320SP2 and SE7525GP2 In-band Traffic LAN RMCP Port 26Fh NIC well known' port address, 162 (0A2h). 5.2.5.1 LAN Channel Specifications The following table presents the minimum support that will be provided. Note that system management software and
  • Intel SE7525GP2 | Product Specification - Page 119
    Intel® Server Boards SE7320SP2 and SE7525GP2 Configuration Capability IPMI Message Authentication Type Support Number of LAN Alert destinations PET Acknowledge support Gratuitous ARP Support Options MD5 1 Yes Yes Platform Management Description/Notes 5.2.5.2 LAN Drivers and Setup The IPMI-over
  • Intel SE7525GP2 | Product Specification - Page 120
    Intel® Server Boards SE7320SP2 and SE7525GP2 5.2.7 Watchdog Timer The mBMC implements an IPMI 1.5-compatible watchdog timer. See the IPMI specification for details. SMI and NMI pre-timeout actions are supported During POST, the BIOS tells the mBMC the current time via the Set SEL Time command.
  • Intel SE7525GP2 | Product Specification - Page 121
    Intel® Server Boards SE7320SP2 and SE7525GP2 Platform Management 5.2.9 Sensor Data Record (SDR Specification, Version 1.5. When the mBMC initializes, or when the system boots, the initialization agent scans the SDR repository and configures the sensors referenced by the SDRs. This includes setting
  • Intel SE7525GP2 | Product Specification - Page 122
    Intel® Server Boards SE7320SP2 and SE7525GP2 The mBMC maintains an Event Filter table with 30 entries that is used to select the actions to perform. Also maintained is a fixed/read-only Alert Policy Table entry. No alert strings are supported determines a set of actions -down Soft shut-down Power
  • Intel SE7525GP2 | Product Specification - Page 123
    Intel® Server Boards SE7320SP2 and SE7525GP2 IPMI Specification v1.5. 5.2.11.3 System Identification in Alerts The PET alert format used in PPP and LAN Alerting contains a system GUID field via the System Interface that support setting/retrieving the alerting configuration LAN alerting in mBMC
  • Intel SE7525GP2 | Product Specification - Page 124
    Intel® Server Boards SE7320SP2 and SE7525GP2 The user does not typically deal with filter contents directly. Instead, the Server Setup Utility provides a user interface that allows the user to select among a fixed set Chassis Control command issued A processor IERR or BIOS missing the NMI if the BIOS
  • Intel SE7525GP2 | Product Specification - Page 125
    Intel® Server Boards SE7320SP2 and SE7525GP2 Platform Management the system crash state can use the Get Power Supply Interface Signals The mBMC supports two power supply control signals: Power On and Power Good. The Power On signal connects to the chassis power subsystem and is used to request
  • Intel SE7525GP2 | Product Specification - Page 126
    Intel® Server Boards SE7320SP2 and SE7525GP2 in reset. ƒ The mBMC sends a Set ACPI Power State command, indicating an S0 state is run. ƒ The mBMC attempts to boot the system by running the FRB algorithm. or power cycle 4 Command Routed through command processor Turns power on or off, or power
  • Intel SE7525GP2 | Product Specification - Page 127
    No 4 Warm boot (example: DOS Ctrl-Alt-Del) Yes No 5 Command to reset the system Yes No 6 Set Processor State command Yes No 7 Watchdog timer configured for reset Yes No 8 FRB3 failure Yes No 9 PEF action Optional No 5.3.3 Temperature-based Fan Speed Control Server board hardware
  • Intel SE7525GP2 | Product Specification - Page 128
    Intel® Server Boards SE7320SP2 and SE7525GP2 The server board has two analog fan speed signals that are driven by pulse-width modulator (PWM) circuits by the server board set the temperature thresholds and corresponding PWM duty cycles. This SDR or table is loaded as part of the server board BIOS,
  • Intel SE7525GP2 | Product Specification - Page 129
    Intel® Server Boards SE7320SP2 and SE7525GP2 which can be used as an OEM-specific diagnostic front panel interface. The Diagnostic server board supports the optional command parameter to allow the timeout to be set anywhere from 1 to 255 seconds. ƒ The optional timeout parameter in the Chassis
  • Intel SE7525GP2 | Product Specification - Page 130
    Management Intel® Server Boards SE7320SP2 and SE7525GP2 ƒ The Chassis Identify processor(s), or processor incompatibility. ƒ Satellite controller sends a critical or non-recoverable state, via the Set Fault Indication command to the BMC. ƒ "Critical Event Logging" errors, including: System Memory
  • Intel SE7525GP2 | Product Specification - Page 131
    Intel® Server Boards SE7320SP2 and SE7525GP2 Platform Management on-Critical Condition ƒ Temperature, voltage, or fan non-critical threshold crossing ƒ Chassis intrusion ƒ Satellite controller sends a non-critical state, via the Set Fault Indication command, to the mBMC ƒ Set Fault Indication
  • Intel SE7525GP2 | Product Specification - Page 132
    Management Intel® Server Boards SE7320SP2 and SE7525GP2 If it is enabled, Secure Mode can be controlled via the Secure Mode KB signal from the keyboard controller. When Secure Mode is active, pressing a protected front panel switch generates a Secure Mode Violation event. Specifically, this
  • Intel SE7525GP2 | Product Specification - Page 133
    Intel® Server Boards SE7320SP2 and SE7525GP2 Platform Management 5.4 Sensors 5.4.1 Sensor Type Codes The following tables list the sensor identification numbers and information regarding the sensor type, name, supported Type Codes table in the IPMI specification. It provides the context in which
  • Intel SE7525GP2 | Product Specification - Page 134
    Intel® Server Boards SE7320SP2 and SE7525GP2 Trig Offset The following table shows the server board/platform sensors that are supported by the mBMC. Table 58. Built Event / Reading Type Sensor Specific 6Fh Sensor Specific 6Fh Sensor Specific 6Fh Sensor Specific 6Fh Event Offset Triggers LAN
  • Intel SE7525GP2 | Product Specification - Page 135
    Intel® Server Boards SE7320SP2 and SE7525GP2 Platform Management Sensor Name Sensor # Sensor Type Watchdog 05h Watchdog2 23h System Boot 06h System PEF Event 07h Platform Alert 08h System boot Initiated 1Dh System Event 12h Platform Alert 24h Event / Reading Type Sensor Specific 6Fh
  • Intel SE7525GP2 | Product Specification - Page 136
    Platform Management Intel® Server Boards SE7320SP2 and SE7525GP2 Sensor # Sensor Name Processor 07h Sensor Specific 6Fh Proc2 IERR 1Eh Processor 07h Sensor Specific 6Fh Proc1 Thermal trip 1Fh Processor 07h Sensor Specific 6Fh Proc2 Thermal trip 20h Processor 07h Sensor Specific
  • Intel SE7525GP2 | Product Specification - Page 137
    Intel® Server Boards SE7320SP2 and SE7525GP2 Platform Management Sensor # Sensor Name Sensor Type Proc2 Throttle 22h Temp 01h Diagnostic Interrupt Button Critical 23h Interrupt 13h Chassis De Analog R, T CPU Configuration Error 29h Processor 07h Generic 03h State Asserted As & De
  • Intel SE7525GP2 | Product Specification - Page 138
    Intel® Server Boards SE7320SP2 and SE7525GP2 6. Error Reporting and Handling The BIOS server management is to correctly and consistently handle system errors. System errors can be categorized as follows: ƒ PCI bus ƒ Memory multi-bit errors (single-bit errors are not logged) ƒ Sensors ƒ Processor
  • Intel SE7525GP2 | Product Specification - Page 139
    Intel® Server Boards SE7320SP2 and SE7525GP2 Error Reporting and Handling PERR# and SERR# through NMI. Disabling NMI for PERR# and/or SERR# also disables logging of the corresponding event. In the case of PERR#, the PCI bus master has the option to retry the offending transaction, or to report it
  • Intel SE7525GP2 | Product Specification - Page 140
    Error Reporting and Handling Intel® Server Boards SE7320SP2 and SE7525GP2 6.1.2.6 Boot Event The BIOS downloads the system date and time to the mBMC during POST and logs a boot event. This record does not indicate an error, and software that parses the event log should treat it as such. 6.1.2.7
  • Intel SE7525GP2 | Product Specification - Page 141
    Intel® Server Boards SE7320SP2 and SE7525GP2 Error Reporting and Handling 6.2 Error Messages and Error Codes The BIOS indicates the Settings Wrong CMOS Checksum Bad Unlock Keyboard PS2 Keyboard not found Error Message 000A 000B 000C 000E 000F KBC BAT Test failed CMOS memory size different RAM
  • Intel SE7525GP2 | Product Specification - Page 142
    Intel® Server Boards SE7320SP2 and SE7525GP2 Error Code 0010 0012 0014 Floppy Controller Failure CMOS time not set Memory to Shadow PCI ROM BSP Processor failed BIST Processor missing microcode - P0 Processor missing microcode - P1 BIOS does not support current stepping - P0 BIOS does not support
  • Intel SE7525GP2 | Product Specification - Page 143
    boot. Processor 01 unable to apply BIOS update Processor 02 unable to apply BIOS update Processor 01 failed BIST Processor 02 failed BIST BIOS does not support current stepping for Processor 1 BIOS does not support current stepping for Processor 2 Watchdog timer failed on last boot OS boot
  • Intel SE7525GP2 | Product Specification - Page 144
    Error Reporting and Handling Intel® Server Boards SE7320SP2 and SE7525GP2 6.2.2 Boot Block Error Beep Codes Number of Beeps 1 2 3 4 5 6 7 8 9 10 11 12 13 1 long beep Table 61. Boot Block Error Beep Codes Description Insert diskette in floppy drive A: 'AMIBOOT.ROM' file not found in root
  • Intel SE7525GP2 | Product Specification - Page 145
    Intel® Server Boards SE7320SP2 and SE7525GP2 Error Reporting and Handling Number of Beeps 1, 2 or 3 4-7, 9-11 8 Troubleshooting Action Reseat the memory, or replace with known good modules. Fatal error indicating a serious problem with the system. Consult your system manufacturer. Before
  • Intel SE7525GP2 | Product Specification - Page 146
    Error Reporting and Handling Intel® Server Boards SE7320SP2 and SE7525GP2 Since the red bits correspond to the upper nibble and the Red 1 Red Green 0 Red 0 Off LSB Green 0 Diagnostic LEDs LSB MSB Back edge of server Figure 18. Location of Diagnostic LEDs (Example only) 134 Revision 4.0
  • Intel SE7525GP2 | Product Specification - Page 147
    Intel® Server Boards SE7320SP2 and SE7525GP2 Error Reporting and Handling 6.3.3 POST Code Checkpoints Table 65. POST Code Checkpoints Checkpoint 03 04 05 06 08 C0 C1 C2 C5 C6 C7 0A
  • Intel SE7525GP2 | Product Specification - Page 148
    Error Reporting and Handling Intel® Server Boards SE7320SP2 and SE7525GP2 Checkpoint 2C 2E 31 33 37 38 39 an adjustment in system RAM size if needed. Updates CMOS memory size from memory found in memory test. Allocates memory for Extended BIOS Data Area from base memory. Initializes NUM-LOCK status
  • Intel SE7525GP2 | Product Specification - Page 149
    Intel® Server Boards SE7320SP2 and SE7525GP2 Error Reporting and Handling Checkpoint A7 A8 A9 AA AB AC B1 00 Diagnostic LED Decoder G=Green, R=Red, A=Amber MSB LSB R G A G A OFF R OFF A OFF R G A OFF A
  • Intel SE7525GP2 | Product Specification - Page 150
    Reporting and Handling Intel® Server Boards SE7320SP2 and SE7525GP2 Checkpoint D8 D9 DA Diagnostic LED Decoder G=Green, R=Red, A=Amber MSB LSB A R OFF R A R OFF A A R G R Description The Runtime module is uncompressed into memory. CPUID information is stored in memory. Store the
  • Intel SE7525GP2 | Product Specification - Page 151
    Intel® Server Boards SE7320SP2 and SE7525GP2 Error Reporting and Handling The flash has been updated successfully. Make flash write manual configured onboard peripherals, memory and I/O decode windows in PCI-PCI bridges, and noncompliant PCI devices. Static resources are also reserved. Boot
  • Intel SE7525GP2 | Product Specification - Page 152
    ECC and Memory Initialization) 6.4 Intel® Light-Guided Diagnostics The server board provides system fault/status LEDs in many areas of the board to alert users to a particular failure or status of a component on the board. There are fault LEDs for the memory DIMMs and processors, and status
  • Intel SE7525GP2 | Product Specification - Page 153
    Intel® Server Boards SE7320SP2 and SE7525GP2 Connector Definitions and Pin-outs 7. Connector Definitions and Pin-outs 7.1 Main Power Connector The main power supply connection is obtained using the 24-pin connector.
  • Intel SE7525GP2 | Product Specification - Page 154
    Connector Definitions and Pin-outs Intel® Server Boards SE7320SP2 and SE7525GP2 Table 73. Auxiliary CPU Power White Brown Brown Yellow (24AWG) 7.2 Memory Module Connector The board has four DDR266/333 DIMM connectors and supports registered ECC DDR modules (Rev 1.0). Table 74. DIMM Connectors
  • Intel SE7525GP2 | Product Specification - Page 155
    Intel® Server Boards SE7320SP2 and SE7525GP2 Connector Definitions and Pin-outs SA2 184 VDDSPD 7.3 Processor Socket The board has two Socket 604 processor sockets. The following table provides the processor socket pin numbers and pin names: Table 75. Socket 604 Processor Socket Pin-out (J36,
  • Intel SE7525GP2 | Product Specification - Page 156
    Connector Definitions and Pin-outs Intel® Server Boards SE7320SP2 and SE7525GP2 Pin No Pin Name Pin No Pin Name A25 TMS E22 HIT# A26 Reserved E23 VSS A27 VSS E24 TCK A28 VCC E25 TDO A29
  • Intel SE7525GP2 | Product Specification - Page 157
    Intel® Server Boards SE7320SP2 and SE7525GP2 Connector Definitions and Pin-outs Pin No Pin Name C4 VCC C5 VTT C6 RSP# C7 VSS C8 A35# C9 A34# C10 VTT C11 A30#
  • Intel SE7525GP2 | Product Specification - Page 158
    Intel® Server Boards SE7320SP2 and SE7525GP2 Intel® Xeon® processor. In systems utilizing the Intel Xeon processor, the system designer must terminate these signals to the processor VTT. 2. Server boards pin socket. Since the additional contact for pin AE30 is electrically inert, the 604-pin socket
  • Intel SE7525GP2 | Product Specification - Page 159
    Intel® Server Boards SE7320SP2 and SE7525GP2 Connector Definitions and Pin-outs Table 78. Remote on the server board. PCI segment A supports 5V 32bit/33 MHz PCI, segment B supports 3.3V 64-bit/66 MHz PCI-X, and segment C supports 3.3V PCI Express* operation. All segments support full-length
  • Intel SE7525GP2 | Product Specification - Page 160
    Connector Definitions and Pin-outs Intel® Server Boards SE7320SP2 and SE7525GP2 Pin 23 24 25 26 27 28 29 30 31 Side B AD[27] AD[25] +3.3V C/BE[3]# AD[23] Ground AD[21] AD[19] +3.3V
  • Intel SE7525GP2 | Product Specification - Page 161
    Intel® Server Boards SE7320SP2 and SE7525GP2 Connector Definitions and Pin-outs Pin 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
  • Intel SE7525GP2 | Product Specification - Page 162
    Connector Definitions and Pin-outs Intel® Server Boards SE7320SP2 and SE7525GP2 Pin Side B 18 GND Side A GND End of the x1 Connector 19 HSOP1 RSVD 20 HSON1 GND 21 GND HSIP1 22 GND HSIN1 23 HSOP2
  • Intel SE7525GP2 | Product Specification - Page 163
    Intel® Server Boards SE7320SP2 and SE7525GP2 Connector Definitions and Pin-outs 7.6 Front Panel Connector A standard SSI 34-pin header is provided to support a system front panel. The header contains reset, NMI, power control buttons, and LED indicators. The following table details the pin-out of
  • Intel SE7525GP2 | Product Specification - Page 164
    Connector Definitions and Pin-outs Intel® Server Boards SE7320SP2 and SE7525GP2 7.7 VGA Connector The following table details the B8 Pin B9 B10 B11 B12 B13 B14 B15 B16 B17 Signal Name Fused VCC (+5V) (NO SUPPORT) NC NC DDCDAT HSY VSY DDCCLK NC NC 7.8 NIC Connector Table 84. NIC1 82541GI(10/100/
  • Intel SE7525GP2 | Product Specification - Page 165
    Intel® Server Boards SE7320SP2 and SE7525GP2 Connector Definitions and Pin-outs 7.9 IDE Connector The board provides two 40-pin ATA-100 IDE connectors Table 85. ATA 40-pin Connector Pin-out (J41, J43) Pin Signal Name 1 RESET# 3 IDE_DD7 5 IDE_DD6 7 IDE_DD5 9
  • Intel SE7525GP2 | Product Specification - Page 166
    Connector Definitions and Pin-outs Intel® Server Boards SE7320SP2 and SE7525GP2 7.11 USB Connector The following table 12 RI_N 13 GND 14 SIUT 15 DTR_N 16 RTS_N A header on the server board provides an option to support one additional USB connector. The pin-out of the header is detailed in the
  • Intel SE7525GP2 | Product Specification - Page 167
    Intel® Server Boards SE7320SP2 and SE7525GP2 Connector Definitions and Pin-outs 7.12 Floppy Connector The board provides a standard 34-pin interface to the floppy drive controller. The following tables detail the pin-out of the 34-pin floppy connector. Table 89.
  • Intel SE7525GP2 | Product Specification - Page 168
    Definitions and Pin-outs Intel® Server Boards SE7320SP2 and SE7525GP2 7.13 Serial Port Connector Two serial ports are provided on the SE7320SP2 and Server Board SE7525GP2. ƒ A standard, external DB9 serial connector is located on the back edge of the server board to supply a Serial A interface
  • Intel SE7525GP2 | Product Specification - Page 169
    Intel® Server Boards SE7320SP2 and SE7525GP2 Connector Definitions and Pin-outs 7.14 Keyboard and Mouse Connector Two PS/2 ports are provided for use by a keyboard and a mouse. The following table details
  • Intel SE7525GP2 | Product Specification - Page 170
    Connector Definitions and Pin-outs Intel® Server Boards SE7320SP2 and SE7525GP2 Table 94. Six-pin Fan headers Pin-out (J44, J46) Pin Signal Name 1 Ground 2 Fan Power 3 Fan Tach 4 Fan PWM 5 N/C 6 N/C Type Power Power Out Out
  • Intel SE7525GP2 | Product Specification - Page 171
    Intel® Server Boards SE7320SP2 and SE7525GP2 Connector Definitions and Pin-outs 7.16 Configuration Jumpers This section describes the configuration jumpers on the server boards. 7.16.1 System Recovery and Update Jumpers The server boards provide an 11-pin single inline header (J17), located on
  • Intel SE7525GP2 | Product Specification - Page 172
    Definitions and Pin-outs Intel® Server Boards SE7320SP2 and SE7525GP2 7.16.2 Rolling BIOS Bank Selection Jumper An additional 3-pin jumper header (J26) is provided to support the Rolling BIOS functionality. This jumper is located near the processor 2 VRD heatsink and the SATA connectors
  • Intel SE7525GP2 | Product Specification - Page 173
    Voltage with Respect to ground -0.3 V to 5.5 V Notes: Chassis design must provide proper airflow to avoid exceeding Intel® Xeon® processor maximum case temperature. VDD means supply voltage for the device Note: Intel Corporation server boards contain a number of high-density VLSI and power
  • Intel SE7525GP2 | Product Specification - Page 174
    General Specifications Intel® Server Boards SE7320SP2 and SE7525GP2 8.3 Processor Power Support The server boards are designed to support the Thermal Design Point (TDP) guideline for Intel® Xeon® processors. In addition, the Flexible Motherboard Guidelines (FMB) have been followed to help
  • Intel SE7525GP2 | Product Specification - Page 175
    Intel® Server Boards SE7320SP2 and SE7525GP2 Figure 21 shows the output voltage timing parameters. Vout 10% Vout V1 V2 V3 General Specifications Tvout rise Tvout_on Tvout_off Figure 21. Output Voltage Timing The following tables show the timing requirements for a single power supply being turned
  • Intel SE7525GP2 | Product Specification - Page 176
    General Specifications Intel® Server Boards SE7320SP2 and SE7525GP2 Table 104. Turn On / Off Timing Item Tsb_on_delay T ac_on_delay Tvout_holdup Tpwok_holdup Tpson_on_delay T pson_pwok Tpwok_on T pwok_off Tpwok_low Tsb_vout T5vsb_holdup Description Delay from AC being applied to
  • Intel SE7525GP2 | Product Specification - Page 177
    Intel® Server Boards SE7320SP2 and SE7525GP2 AC Input Vout TAC_on_delay Tsb_on_delay PWOK Tvout_holdup Tpwok_on Tpwok_holdup Tpwok_off Tpwok_low Tsb_on_delay General Specifications Tpwok_on Tpwok_off Tpson_pwok 5VSB PSON Tsb_vout Tpson_on_delay AC turn on/off cycle PSON turn on/off
  • Intel SE7525GP2 | Product Specification - Page 178
    General Specifications Intel® Server Boards SE7320SP2 and SE7525GP2 8.4.2 Voltage Recovery Timing Specifications The power supply must conform to the following specifications for voltage recovery timing under load changes: ƒ Voltage shall remain within +/- 5% of the nominal set voltage on the
  • Intel SE7525GP2 | Product Specification - Page 179
    Intel® Server Boards SE7320SP2 and SE7525GP2 Product Regulatory Compliance 9. Product Regulatory Compliance 9.1 Product Safety Compliance The server boards comply with the following safety requirements: ƒ UL60950 - CSA60950 (US/Canada) - Recognition ƒ EN 60950 (CENELEC Europe) ƒ IEC60950 (
  • Intel SE7525GP2 | Product Specification - Page 180
    Product Regulatory Compliance Intel® Server Boards SE7320SP2 and SE7525GP2 9.1.2 Mandatory/Standard: Certifications, Registration, Declarations UL Recognition (US/Canada) CE Declaration of Conformity (CENELEC Europe) FCC/ICES-003 Class A Verification (USA/Canada) VCCI Certification (Japan) -
  • Intel SE7525GP2 | Product Specification - Page 181
    on the server board powers the real time clock (RTC) for up to 10 years in the absence of power. When the battery starts to weaken, it loses voltage, and the server settings stored in CMOS RAM in the RTC (for example, the date and time) may be wrong. Contact your customer service representative or
  • Intel SE7525GP2 | Product Specification - Page 182
  • Intel SE7525GP2 | Product Specification - Page 183
    are supported. Intel® server boards SE7320SP2 and SE7525GP2 are not designed for multicore processor. Processors must be populated in sequential order; socket CPU1 must be populated before socket CPU 2. You do not need to install a terminator in an unused processor socket. Only DDR 266 or 333 MHz
  • Intel SE7525GP2 | Product Specification - Page 184
    Glossary Intel® Server Boards SE7320SP2 and SE7525GP2 Glossary This appendix contains important terms used in the Configuration and Power Interface Baseboard Management Controller Common Enabling Kit Correctable Memory Error Digital Video Interface Fast Management Link Flexible Management Module
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Intel
®
Server Boards
SE7320SP2 and SE7525GP2
Technical Product Specification
Intel reference number D24635-004
Revision 4.0
December, 2005
Enterprise Platforms and Services Division - Marketing