Vizio P42HDTV10A Service Manual

Vizio P42HDTV10A - 42" Plasma TV Manual

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  • Vizio P42HDTV10A | Service Manual - Page 1
  • Vizio P42HDTV10A | Service Manual - Page 2
    of Circuit Operation 9. Waveforms 10. Trouble Shooting 11.Spare Parts List 12. Complete Parts List Appendix 1. Main Board Circuit Diagram 2. Main Board PCB Layout 3. Assembly Explosion Drawing Block Diagram PAGE 1-1 2-1 3-1 4-1 5-1 6-1 7-1 8-1 9-1 10-1 11-1 12-1 VIZIO P42HDTV10A Service Manual
  • Vizio P42HDTV10A | Service Manual - Page 3
    SAFETY CAUTION Use a power cable that is properly grounded. Always use the AC cords as follows - USA (UL); Canada (CSA); Germany (VDE); Switzerland (SEV); Britain (BASEC/BS); Japan (Electric Appliance Control Act); or an AC cord that meets the local safety standards. VIZIO P42HDTV10A Service Manual
  • Vizio P42HDTV10A | Service Manual - Page 4
    768 pixel resolution with 16:9 wide screen y ATSC (Off-air)/QAM (Cable)/NTSC (Antenna/Cable) y All TV formats supported (480i, 480p, 720p & 1080i) y PC compatible (RGB) up to 1280 x 1024 WXGA y High definition digital interface - HDMI y Multiple-screen display (picture-on-picture/picture-in-picture
  • Vizio P42HDTV10A | Service Manual - Page 5
    . 300 cd/ m2 Contrast Ratio 10,000:1 (Typical, panel spec). TV system NTSC/ATSC/ QAM PC Inputs 15pins D-sub, HDMI-DVI Video Inputs 1 x S-Video 3 x AV inputs (CVBS; RCA type) 2 x Component (Y Pb/Pr Cb/Cr) 1 x HDMI Audio Inputs 6 x Stereo RCA (R/L), 1 x PC Mini-Jack Audio Outputs Analog
  • Vizio P42HDTV10A | Service Manual - Page 6
    Display Pixels 1,024 (H) x 768 (V) pixels Display Cells 3,072 (H) x 768 (V) cells Pixel Pitch 0.9 (H) x0.676 (V) mm Pixel Type y=0.329±0.02 5000K: x=0.346±0.02, y=0.359±0.02 Remarks RGB RGB /VIDEO RGB 3. Power Supply a. Input voltage 100-240Vac, 50/60Hz b. Input current 4.5A or
  • Vizio P42HDTV10A | Service Manual - Page 7
    5. Dimensions Item a. Height b. Width c. Depth W/Stand 780 mm 1072mm 290 mm 6. Weight a. Net: 38.8 +/- 0.5 kgs b. Gross: 47.5 +1.5 kgs /- 0.5 kgs W/O stand 755 mm 1072mm 109 mm CONFIDENTIAL - DO NOT COPY Page 2-3 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 8
    Display Input Menu Operation Menu TV Mode A. PICTURE ADJUST： a. PICTURE MODE (USER/ VIVID1 / VIVID2 / VIVID3) b. Adjust the BRIGHTNESS (0~100) c. Adjust the CONTRAST (0~100) d. Adjust the COLOR (saturation) (0~100) e. Adjust the TINT (hue) (0~100) f. Adjust the SHARPNESS (0~100) g.
  • Vizio P42HDTV10A | Service Manual - Page 9
    SKIP CHANNEL (YES/NO) D. PARENTAL CONTROL： a. PARENT LOCK ENABLE (ON/OFF) b. TV RATING c. MOVIE RATING d. ACCESS CODE EDIT E. PIP SETUP： a. STYLE (OFF/PIP/POP) b. Source (AV1、AV2、AV3、ANALOG HD1、 ANALOG HD2、DIGITAL HD、RGB) c. SIZE (SMALL/MEDIUM/LARGE) d. POSITION (TOP LEFT/TOP CENTER/TOP RIGHT/MIDDLE
  • Vizio P42HDTV10A | Service Manual - Page 10
    ) g. MUTE (ON/OFF) h. SPEAKERS (ON/OFF) D. PIP SETUP： a. STYLE (OFF/PIP/POP) b. SOURCE (AV1、AV2、AV3、TV) c. SIZE (SMALL/MEDIUM /LARGE) d. POSITION (TOP LEFT/TOP CENTER/TOP RIGHT/MIDDLE LEFT/MIDDLE RIGHT/BOTTOM LEFT/BOTTOM CENTER/BOTTOM RIGHT) CONFIDENTIAL - DO NOT COPY Page 3-3 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 11
    , HALL, ARENA) g. MUTE (ON/OFF) h. SPEAKERS (ON/OFF) i. AUDIO SOURCE (HDMI/DVII) NOTE: While main or pip exists HDMI source, audio option will add an AUDIO SOURCE item. C. PARENTAL CONTROL： a. PARENT LOCK ENABLE (ON/OFF) b. TV RATING c. MOVIE RATING d. ACCESS CODE EDIT CONFIDENTIAL - DO NOT COPY
  • Vizio P42HDTV10A | Service Manual - Page 12
    TV) c. SIZE (SMALL /MEDIUM/LARGE) d. POSITION (TOP LEFT/TOP CENTER/TOP RIGHT/MIDDLE LEFT/MIDDLE RIGHT/BOTTOM LEFT/BOTTOM CENTER/BOTTOM RIGHT) E. SPECIAL FEATURES： a. LANGUAGE (ENGLISH/FRANÇAIS/ ESPAÑOL) b. SLEEP TIMER (OFF/30/60/90/120) c. WIDE FORMAT (NORMAL/WIDE/ZOOM) d. RESET ALL SETTING e. IMAGE
  • Vizio P42HDTV10A | Service Manual - Page 13
    ) h. SPEAKERS (ON/OFF) C. PARENTAL CONTROL： a. PARENT LOCK ENABLE (ON/OFF) b. TV RATING c. MOVIE RATING d. ACCESS CODE EDIT D. PIP SETUP： a. STYLE (OFF/PIP/POP) b. SOURCE (AV2, AV3, COMPONENT 1, COMPONENT 2, HDMI, RGB, TV, DTV) c. SIZE (SMALL/MEDIUM/LARGE) d. POSITION (TOP LEFT/TOP CENTER/TOP RIGHT
  • Vizio P42HDTV10A | Service Manual - Page 14
    MIN) c. WIDE FORMAT (NORMAL/WIDE/ZOOM) d. RESET ALL SETTING e. IMAGE CLEANER A. DTV TUNER SETUP a. TIME ZONE: 1.HAWALL 2.EASTTERN TIME 3.INDIANA 4.CENTRAL TIME 5.MOUNTAIN TIME 6.ARIZONA 7.PACIFIC TIME 8.ALASKA b. CABLE/AIR/AUTO c. SCAN d. MANUAL SCAN SCAN MODE: 1. ADD-ON MODE 2. RANGE MODE (1)FROM
  • Vizio P42HDTV10A | Service Manual - Page 15
    CAPTION (OFF/YES) b. DIGITAL CLOSED CAPTION (OFF/YES) CONFIDENTIAL - DO NOT COPY c. DIGITAL CAPTION STYLE 1.AS BROADCASTER 2.CUSTOM (1) FONT SIZE α.LARGE β.SMALL γ.MEDIUM (2) FONT COLOR α.BLACK Page 3-8 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 16
    β.WHITE γ.GREEN δ.BLUE ε.RED ζ.CYAN η.YELLOW θ.MAGENTA (5) BLACKGROUND OPACITY α.SOLID β.TRANSLUCENT γ.TRANSPARENT (6) WINDOW COLOR α.BLACK β.WHITE γ.GREEN δ.BLUE ε.RED ζ.CYAN η.YELLOW θ.MAGENTA (7) WINDOW OPACITY α.SOLID β.TRANSLUCENT γ.TRANSPARENT CONFIDENTIAL - DO NOT COPY Page 3-9 File No
  • Vizio P42HDTV10A | Service Manual - Page 17
    C. PASSWORD - PRESS , enter 0000 - get to "CHANNEL BLOCK", then press PIP table Sub MAIN AV1 AV2 AV3 COMPONENT 1 COMPONENT 2 HDMI* RGB TV DTV AV1 N Y Y Y Y Y Y Y Y AV2 Y N Y Y Y Y Y Y Y AV3 Y Y N Y Y Y Y Y Y COMPONENT 1 Y Y Y N N N N Y N COMPONENT 2 Y
  • Vizio P42HDTV10A | Service Manual - Page 18
    Horizontal Frequency (KHz) Vertical Frequency (Hz) Horizontal Vertical Sync Sync Pixel Rate Remark Polarity Polarity (MHz) (TTL) (TTL) 1 .000 Windows Remark: P: positive, N: negative €1024x768 @60 Hz: Primary 2. HDMI video digital preset modes Mode No. 1 2 3 4 Resolution 480i 480p 720p 1080i
  • Vizio P42HDTV10A | Service Manual - Page 19
    -DVI video preset modes Mode No. 1 2 3 4 Resolution 480i 480p 720p 1080i 4. HDMI-DVI PC preset modes Mode No. 1 Refresh Horizontal Resolution Rate Frequency (Hz) (KHz) 640x480 60 31.5 Horizontal Vertical Vertical Sync Sync Frequency Polarity Polarity (Hz) (TTL) (TTL) 59.94 N N Pixel
  • Vizio P42HDTV10A | Service Manual - Page 20
    Chapter 5 Pin Assignment There are analog and digital connectors as video input source in this model. A. Input signal 1. RGB PC Connector a. Type: b. Frequency: c. Signal level: d. Impedance: e. Synchronization f. Video bandwidth: g. Connector type: 5 10 15 Analog H: 30-80KHzV: 60-85Hz 0.7Vp-p 75
  • Vizio P42HDTV10A | Service Manual - Page 21
    2. HDMI Connector a. Frequency: b. Polarity: c. Type: d. Pin Assignment: H: 15.734KHz H: 31KHz H: 45KHz H: 33KHz Positive or Negative Type A Please see below Pin 19 6 TMDS Data18 TMDS Data0 Shield 10 TMDS Clock+ 12 TMDS Clock14 Reserved (N.C. on device) 16 SDA 18 +5V Power Page 5-2 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 22
    Frequency: H: 15.734KHz V: 60Hz (NTSC) b. Signal level: Y: 1Vp-p C: 0.286Vp-p c. Impedance: 75Ω d. Connector type: 4-pin mini DIN 5. Component video Connector a. Frequency: H: 15.734KHz V: 60Hz (NTSC-480i) H: 31KHz V: 60Hz (NTSC-480p) H: 45KHz V: 60Hz (NTSC-720p) H: 33KHz V: 60Hz
  • Vizio P42HDTV10A | Service Manual - Page 23
    -p minimum b. Frequency 57~803 MHz QAM system (supporting clear QAM) a. IF-output level 1Vp-p minimum b. Frequency 57~849 MHz 7. PC Stereo audio a. Signal level: 1Vrms b. Impedance: 47KΩ c. Connector type: 3.5 φ mini jack 8. Video Stereo audio a. Signal level: 0.7Vrms b. Impedance
  • Vizio P42HDTV10A | Service Manual - Page 24
    1. Analog Audio out a. Signal level: 0.7Vrms b. Impedance: 47KΩ c. Frequency Response: 250Hz-20KHz d. Connector type:RCA L/R 2. Digital audio out a. Peak emission wave length: 630 - 690 µm b. Transmission Speed: 13.2M pbs c. Connector type: Optical fiber transmitter 3. Headphone a. Signal
  • Vizio P42HDTV10A | Service Manual - Page 25
    42'' PDP XGA panel The TV system block diagram is powered by power board that transforms AC source of 100V~240V AC +/- 10% @ 50/60 HZ into system request power source. The main board receives different types of video signal into the MTK8205 Ic. Afterward, the MTK8205 Ic process the signals control
  • Vizio P42HDTV10A | Service Manual - Page 26
    passing through decoder, the signal will be with the digital signal tri-dtate from HDMI transfer to digital port of MT8205 . All functions are controllable by the main board. Plus, all functions in the IC boards are programmable using I2C Bus. CONFIDENTIAL - DO NOT COPY Page 6-2 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 27
    Main Board Block Diagram CONFIDENTIAL - DO NOT COPY Page 6-3 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 28
    TD1336 U6 PORT SAW FILTER U7 AGC Amplifiers U8 I2C Demodulator MT5111 U9 Video Signal Audio Signal Communicate Signal Control Pin CONFIDENTIAL - DO NOT COPY DDR SDRAM U12,U13 I2C DTV Backend Decoder MT5351 U10 IDTQS3VH257 AUD_CTRL U18 FCC 50PIN CON. J1 For Main Board DV33 VOLTAGE
  • Vizio P42HDTV10A | Service Manual - Page 29
    Chapter7 Main Board I/o Connections J7 CONNECTION (TOP→BOTTOM) Pin 1 2 3 4 5 6 7 8 9 10 11 12 Description "Auto" "Left" "Right" "Down" "Gnd" "Up" "Menu" "Source" "Power" "LED" "IR" "+5V" J1 CONNECTION (TOP→BOTTOM) Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 CONFIDENTIAL - DO NOT COPY Description "POWRSW"
  • Vizio P42HDTV10A | Service Manual - Page 30
    J3 CONNECTION (TOP→BOTTOM) Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description "SVDET2#" "S1C_GND" "S1C_IN" "S1Y_GND" "S1Y_IN" "AGND" "AV3R" "AV3R GND" "AV3L" "AV3_GND" "AV3_IN" "AV3L GND" "HPL" "HPDET#" "HPR" "GNDV" CONFIDENTIAL - DO NOT COPY Page 7-2 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 31
    9 "VOVSYNC" 34 10 "VOHSYNC" 35 11 "GND" 36 12 "VOR7" 37 13 "VOR6" 38 14 "VOR5" 39 15 "VOR4" 40 16 "GND" 41 17 "VOR3" 42 18 "VOR2" 43 19 "VOR1" 44 20 "VOR0" 45 21 "GND" 46 22 "VOG7" 47 23 "VOG6" 48 24 "VOG5" 49 25 "VOG4" 50 Description
  • Vizio P42HDTV10A | Service Manual - Page 32
    J8 CONNECTION (TOP→BOTTOM) Pin 1 2 3 4 5 Description "+5V" "GND" "GND" "+12V" "+12V" CONFIDENTIAL - DO NOT COPY Page 7-4 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 33
    will be with the digital signal tri-dtate from HDMI transfer to digital port of MT8205 The operation of keypad There are 7 keys to control and select the function of P42 and also has one LED to indicate the status of operation. They are "Power, Menu, CH+,CH-, VOL+ ,VOL -, Input". CONFIDENTIAL - DO
  • Vizio P42HDTV10A | Service Manual - Page 34
    (OGO5) is high the LED is green (Open power). MT8205 Application MT8205 is a highly integrated single chip for PDP TV supporting video input and output format up to HDTV. It includes 3D comb filter TV Decoder to retrieve the best image from popular composite signals. On-chip advanced motion adaptive
  • Vizio P42HDTV10A | Service Manual - Page 35
    BOLOCK DIAGRAM 1. Video input a. Input Multiplexing 1.component X2 2.composite X3 3.s-videoX1 4.HDMI X1 5.VGA X1 6.RF X2 CONFIDENTIAL - DO NOT COPY Page 8-3 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 36
    b. Input formats: 1.support HDTV 480i/480p/720p/1080i 2.support Y/C signal 1VP-P/75Ω 3.support Y/C signal 1VP-P/75Ω 4.support 480i/408p/720p/1080i 5.support VGA input up to 1280x1024@60HZ 6.support NTSC system Frequency 55~801MHZ 7. support ATSC system Frequency 57~863MHZ 2. TV Decoder For pip/pop:
  • Vizio P42HDTV10A | Service Manual - Page 37
    blending among these two planes and video Support text/bitmap decoder Support line/rectangle/gradient fill Support bitblt Support color key function Support clip mask 65535/256/16/4/2-color bitmap format OSD Automatic vertical scrolling of OSD image Support OSD mirror and upside down CONFIDENTIAL
  • Vizio P42HDTV10A | Service Manual - Page 38
    detection Key detection Key detection Key detection Key detection Key detection Key detection Key detection Power on of TV board and panel Backlight Adjustmance Select mute RCA out mute S-video Detect HDMI SCDT YCBCRSEL Backlight ON/OFF HDMI CAB CONFIDENTIAL - DO NOT COPY Page 8-6 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 39
    A/V1 C99X999999 A/V2 D999X99999 A/V3 (Side) E9999X9999 Analog HD1 (480i~1080i) F X 9 9 9 9 X X X X Analog HD2 (480i~1080i) G X 9 9 9 9 X X X X Digital HD1 (HDMI) HX9999X X X X RGB I X9999X X X X Input Matrix for Windowing Functionality 6. Video processor a. Color management Flesh tone
  • Vizio P42HDTV10A | Service Manual - Page 40
    32X Advanced linear and non-linear Panorama scaling Programmable Zoom viewer Picture in picture (PIP) Picture in picture d. Display 12/10 10/8 8/6 Dithering processing for PDP display 10bit gamma correction Support Alpha blending for Video and two OSD panel Frame rate conversion 7. DRAM Usage 8205
  • Vizio P42HDTV10A | Service Manual - Page 41
    8. Flash Usage Flash is used to store FW code, fonts, bitmaps, and big tables for VGA, Video, and Gamma 2Mbyte is recommended to build a general TV model MTK8205 Flash ROM support test report CONFIDENTIAL - DO NOT COPY Page 8-9 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 42
    DDR SDRAM (M13S128168A-6T) Application Pin description CONFIDENTIAL - DO NOT COPY Page 8-10 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 43
    before or at the same time as VTT & VREF). 2. Start clock and maintain stable condition for a minimum of 200us. 3. The minimum of 200us after stable power and clock (CLK, CLK), apply NOP & take CKE high. 4. Issue precharge commands for all banks of the device. 5. Issue EMRS to enable DLL. (To issue
  • Vizio P42HDTV10A | Service Manual - Page 44
    device operation. 2. Mode Register Set (MRS) The mode register stores the data for controlling the various operating modes of DDR SDRAM. It programs CAS latency, addressing mode, burst length, test mode, DLL reset and various vendor specific options to make DDR SDRAM useful for variety of different
  • Vizio P42HDTV10A | Service Manual - Page 45
    3. Precharge The precharge command is used to precharge or close a bank that has activated. The precharge command is issued when CS, RAS and WE are low and CAS is high at the rising edge of the clock. The precharge command can be used to precharge each bank respectively or all banks simultaneously.
  • Vizio P42HDTV10A | Service Manual - Page 46
    4. Row Active The Bank Activation command is issued by holding CAS and WE high with CS and RAS low at the rising edge of the clock (CLK). The DDR SDRAM has four independent banks; so two Bank Select addresses (BA0, BA1) are required. The Bank Activation command to the first read or write command
  • Vizio P42HDTV10A | Service Manual - Page 47
    strobe edge enabled after tDQSS from the rising edge of the clock (CLK) that the write command is issued. The remaining data inputs must be supplied on each subsequent falling and rising edge of Data Strobe until the burst length is completed. When the burst has been finished, any additional data
  • Vizio P42HDTV10A | Service Manual - Page 48
    MX29LV800T/B & MX29LV800AT/AB is packaged in 44-pin SOP, 48-pin TSOP, and 48-ball CSP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. CONFIDENTIAL - DO NOT COPY Page 8-16 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 49
    specific address and data sequences into the command register. Writing incorrect address and data values or writing them in the improper sequence will reset the device to the read mode. Table 5 defines the valid register command sequences. Note that the Erase Suspend (B0H) and Erase Resume (30H
  • Vizio P42HDTV10A | Service Manual - Page 50
    To program data to the device or erase sectors of memory, the system must drive WE and CE to VIL, and OE to VIH. The sequences. Writing incorrect address and data values or writing them in the improper sequence resets the device to reading array data. Section has details on erasing a sector or
  • Vizio P42HDTV10A | Service Manual - Page 51
    sequence, the device enters the auto select mode. The system can then read auto select codes from the internal register register contents are altered. If program-fail or erase-fail happen, the write of F0H will reset the device to abort the operation. A valid command must then be written to place the
  • Vizio P42HDTV10A | Service Manual - Page 52
    reading array data after device power-up. No commands are system must issue the reset command to re-enable the device for reading array data if Q5 goes high, or while in the auto select mode. See the "Reset Command" section, next. 5. RESET COMMAND Writing the reset command to the device resets
  • Vizio P42HDTV10A | Service Manual - Page 53
    integrated single-chip 8-VSB , designed specifically for the digital terrestrial. HDTV receivers . The chip is fully compliant with the ATSC A/53 digital TV standard. MT5111 includes a 10-bit A/D converter , 8-VSB demodulator , TCM(Trellis-Coded Modulation gain control keeps the received power level
  • Vizio P42HDTV10A | Service Manual - Page 54
    to the demodulation of HDTV signal , MT5111 also turn off almost all embedded hardware except the on-chip controller to reduce the power consumption . Resuming form sleep mode is also triggered by the system host . Upon returning to the operation mode , the chip will try to re-acquire the DTV
  • Vizio P42HDTV10A | Service Manual - Page 55
    15. Controlled by I2C interface 16. Supports sleep mode to save power consumption 17. Core power supply : 1.8V , peripheral power supply : 3.3V 18.100-LQFP package MT5351 Application : MediaTek MT5351 is a DTV Backend Decoder SOC which support flexible transport demux , HD MPEG-2 video decoder
  • Vizio P42HDTV10A | Service Manual - Page 56
    I-Cache and 16K D-Cache 3. 8K Data TCM and 8K instruction 4. JTAG ICE interface 5. Watch Dog timers B . Transport Demuxer : 1. Support 3 independent transport stream inputs 2. Support serial/parallel interface for each transport stream input 3. Support ATSC , DVB , and MPEG2 transport stream inputs
  • Vizio P42HDTV10A | Service Manual - Page 57
    down source detection. 4. Arbitrary ratio vertical/horizontal scaling of video , from 1/15X to 16X. 5. Support Edge preserve. 6. Support horizontal edge enhancement. 7. Support Quad-Picture. H . Main Display : 1. Mixing two video and three OSD and hardware cursor. 2. Contrast/Brightness adjustment
  • Vizio P42HDTV10A | Service Manual - Page 58
    . 9. 3D surround processing include virtual surround. 10. Audio and video lip synchronization. 11. Support reverberation. 12. SPDIF out. 13. I2S I/F. O . Peripherals : 1. Three UARTs with Tx and Rx FIFO , two of them have hardware flow control. 2. Two serial interfaces , one is master only the other
  • Vizio P42HDTV10A | Service Manual - Page 59
    It is designed to be reprogrammed and erased in system or in standard EPROM programmers. The standard MX29LV320AT/B (CE) and output enable (OE) controls. MXIC's Flash memories augment EPROM functionality MX29LV320AT/B uses a 2.7V to 3.6V VCC supply to perform the High Reliability Erase and auto
  • Vizio P42HDTV10A | Service Manual - Page 60
    CONFIDENTIAL - DO NOT COPY Page 8-28 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 61
    BLOCK DIAGRAM CONFIDENTIAL - DO NOT COPY Page 8-29 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 62
    BUS OPERATION--1 Legend: L=Logic LOW=VIL, H=Logic High=VIH, VID=12.0 0.5V, VHH=11.5-12.5V, X=Don't Care, AIN=Address IN, DIN=Data IN,DOUT=Data OUT Notes: 1. When the WP/ACC pin is at VHH, the device enters the accelerated program mode. See "Accelerated Program Operations" for more information. 2.
  • Vizio P42HDTV10A | Service Manual - Page 63
    COMMANDS/COMMAND SEQUENCES To program data to the device or erase sectors of memory , the system must drive WE and CE to VIL, and OE to VIH. An erase operation can address and data values or writing them in the improper sequence resets the device to reading array data. Section has details on erasing
  • Vizio P42HDTV10A | Service Manual - Page 64
    array or Automatic Select data, all bus cycles are write operation. 3.The Reset command is required to return to the read mode when the device is in read array data or when device is in Automatic Select mode. 8.The system may read and program functions in non-erasing sectors, or enter the Automatic
  • Vizio P42HDTV10A | Service Manual - Page 65
    integrity. Current is reduced for the duration of the RESET pulse. When RESET is held at VSS 0.3V, the device draws CMOS standby current (ICC4). If RESET is held at VIL but not within VSS 0.3V, the standby current will be greater. The RESET pin may be tied to system reset circuitry. A system reset
  • Vizio P42HDTV10A | Service Manual - Page 66
    during Embedded Algorithms). The system can read data tRH after the RESET pin returns to VIH. Refer to the AC Characteristics tables for RESET parameters and to Figure Unprotection". Note that the WP/ACC pin must not be left floating or unconnected; inconsistent behavior of the device may result.
  • Vizio P42HDTV10A | Service Manual - Page 67
    Table B. Write Operation Status Notes: 1.Performing successive read operations from the erase-suspended sector will cause Q2 to toggle. 2.Performing successive read operations from any address will cause Q6 to toggle. 3.Reading the byte/word address being programmed while in the erase-suspend
  • Vizio P42HDTV10A | Service Manual - Page 68
    Fig D. READ TIMING WAVEFORMS CONFIDENTIAL - DO NOT COPY Page 8-36 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 69
    Fig E. RESET TIMING WAVEFORM CONFIDENTIAL - DO NOT COPY Page 8-37 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 70
    DDR SDRAM (NT5DS16M16CS-5T) Application : Functional Description The 256Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 268, 435, 456 bits. The 256Mb DDR SDRAM is internally configured as a quad-bank DRAM. The 256Mb DDR SDRAM uses a double-data-rate architecture to achieve
  • Vizio P42HDTV10A | Service Manual - Page 71
    Block Diagram (16Mb x 16) Note: This Functional Block Diagram is intended to facilitate user understanding of the operation of the device; it does not represent an actual circuit implementation. Note: DM is a unidirectional signal (input only), but is internally
  • Vizio P42HDTV10A | Service Manual - Page 72
    Pin Configuration - 400mil TSOP II (x4 / x8 / x16) CONFIDENTIAL - DO NOT COPY Page 8-40 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 73
    A12 to zero, and bits A0-A6 set to the desired values. A DLL reset is initiated by issuing a Mode Register Set command with bits A7 and A9-A12 A0-A6 set to the desired values. A Mode Register Set command issued to reset the DLL should always be followed by a Mode Register Set command to select normal
  • Vizio P42HDTV10A | Service Manual - Page 74
    BA1 = 0) and retains the stored information until it is programmed again or the device loses power. The Extended Mode Register must be loaded when all banks are idle, and the controller must wait the specified time before initiating any subsequent operation. Violating either of these requirements
  • Vizio P42HDTV10A | Service Manual - Page 75
    and BA0, BA1 are "Don't Care." 6. This command is auto refresh if CKE is high; Self Refresh if CKE is low. 7. Internal refresh counter controls row and bank addressing; all inputs and I/Os are "Don't Care" except for CKE. 8. Applies only to read bursts with Auto Precharge disabled; this command
  • Vizio P42HDTV10A | Service Manual - Page 76
    refresh is required. The refresh addressing is generated by the internal refresh controller. This makes the address bits "Don't Care" during an Auto Refresh retain data in the DDR SDRAM, even if the rest of the system is powered down.When in the self refresh mode, the DDR SDRAM retains data without
  • Vizio P42HDTV10A | Service Manual - Page 77
    (i.e. at the next crossing of CK and CK). The following timing figure entitled "Read Burst: CAS Latencies (Burst Length=4)" illustrates the general timing for each supported CAS latency setting. DQS is driven by the DDR SDRAM along with output data. The initial low state on DQS is known as the read
  • Vizio P42HDTV10A | Service Manual - Page 78
    Random Read Accesses: CAS Latencies (Burst Length = 2, 4 or 8) CONFIDENTIAL - DO NOT COPY Page 8-46 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 79
    Read Command Writes Write bursts are initiated with a Write command, as shown in timing figure Write Command on following: The starting column and bank addresses are provided with the Write command, and Auto Precharge is either enabled or disabled for that access. If Auto Precharge is enabled, the
  • Vizio P42HDTV10A | Service Manual - Page 80
    Data for any Write burst may be concatenated with or truncated with a subsequent Write command. In either case, a continuous flow of input data can be maintained. The new Write command can be issued on any positive edge of clock following the previous Write command. The first data element from the
  • Vizio P42HDTV10A | Service Manual - Page 81
    mixed with the DAC signal. There are also Headphone and line outputs, with control for the headphone The WM8776 supports fully independent sample rates for the ADC and DAC. The audio data interface supports I2S, left justified, right justified and DSP formats. CONFIDENTIAL - DO NOT COPY Page 8-49
  • Vizio P42HDTV10A | Service Manual - Page 82
    (DACLRC or ADCLRC) typically 32KHZ, 44.1KHZ, 48KHZ or 96KHZ (the DAC also supports operation at 128fs and 192fs and 192KHZ sample rate). The master clock is used to master clock frequency and the sampling rate (to within +/- 32 system clocks) If there is a greater than 32 clocks error the interface
  • Vizio P42HDTV10A | Service Manual - Page 83
    The audio interfaces operations in either slave mode selectable using the MS control bit. In slave mode DIN is always an input to the data is output on DOUT and changes on the falling edge of ADCBCLK. By setting control bit BCLKINV the polarity of ADCBCLK and DACBCLK may be reversed so that DIN and
  • Vizio P42HDTV10A | Service Manual - Page 84
    b. 2 Wire serial control mode The wm8776 supports software control via a 2-wire serial bus. Many devices can be controlled by the same bus, and possible device addresses, which can be selected using the CE pin In the L37 LCD TV CE pin is LOW (device address is 34h). In the L37 wm8776 has 2-wire
  • Vizio P42HDTV10A | Service Manual - Page 85
    a complete solution for receiving HDMI compliant digital audio and video. Specialized audio and video processing is available within the sil9011 to easily and cost effectively adds HDMI capability to consumer electronics devices such as digital TVs, plasma displays, LCD TVs and projectors. BLOCK
  • Vizio P42HDTV10A | Service Manual - Page 86
    /1080P. 2. Active port detection The Pane Link core detects an active TMDS clock and actively toggling DE signal. These states are accessible in register bits, useful for monitoring the status of the HDMI input or for automatically powering down the receiver. The 5V supply from the HDMI connector is
  • Vizio P42HDTV10A | Service Manual - Page 87
    The receiver can also process the video data before it is output as show below figure 5. I2c Interface to Display Controller The Controller I2c interface (CSDA, CSCL) on the sil9011 is a slave interface capable of running up to 400KHZ. This bus is used to configure the SIL9011 by
  • Vizio P42HDTV10A | Service Manual - Page 88
    Bus I2C BUS is interring bus system controlled by 2 lines (SDA, SCL). Data are transmitted and received in the units of byte and Acknowledge. It is transmitted by MSB first from the Start conditions. The data format is set as shown in the following figure. In the L32 TV MM1492 slave address, ADR
  • Vizio P42HDTV10A | Service Manual - Page 89
    2. Switch control table a. Video output 1 b. Audio output 1 c. Audio gain CONFIDENTIAL - DO NOT COPY Page 8-57 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 90
    TDA8946 Application In L32 TV the TDA8946AJ is a dual-channel audio power amplifier with DC gain control. It has an output power of 2 10 W at an 8 load and a 12 V supply. Block diagram 1. Input configuration The TDA8946AJ inputs can be driven symmetrical (floating) as well as asymmetrical. In
  • Vizio P42HDTV10A | Service Manual - Page 91
    2. Output power measurement The output power as a function of the supply voltage is measured on the output pins at THD = 10%,in the L32 LCD TV Vcc=12V so we can see as shown in the following figure output about 7W. CONFIDENTIAL - DO NOT COPY Page 8-59 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 92
    3. Mode selection In the L32 LCD TV TDA8946AJ has two functional modes, which can be selected by applying the proper DC voltage to pin MODE. a. Mute - In this mode the amplifier is
  • Vizio P42HDTV10A | Service Manual - Page 93
    Chapter 9 Waveforms Main Board 1. Voltage Measurement (1) 12V (DV120B, U6-1) (2) 9V (AV_V90, U6-3) CONFIDENTIAL - DO NOT COPY Page 9-1 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 94
    (3) 5V (DV50A, CB15) (4) 3.3V (DV33A, U5-3) CONFIDENTIAL - DO NOT COPY Page 9-2 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 95
    (5) 2.5V (DV25, CE42) (6) 1.8V (DV18A, U5-2) CONFIDENTIAL - DO NOT COPY Page 9-3 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 96
    2. Clock Timing (1) MT8205 Clock (Ch1 U9-A15, XTALI / Ch2 U9-B15, XTALO) (2) Memory Clock (Ch1 U11-45, D_CLK / Ch2 U12-45, D_CLK) CONFIDENTIAL - DO NOT COPY Page 9-4 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 97
    (3) Sil 9011 Clock (Ch1 U16-85, XTLI / Ch2 U16-84, XTLO) CONFIDENTIAL - DO NOT COPY Page 9-5 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 98
    3. H-sync & V-sync Timing (1) PC Mode (1024 x 768 60Hz) Ch1 H-sync (FB46) / Ch2 V-sync (FB45) CONFIDENTIAL - DO NOT COPY Page 9-6 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 99
    ATSC Board 1. Voltage Measurement (1) 12V (+12V, C4) (2) 5V (+5V, C239) CONFIDENTIAL - DO NOT COPY Page 9-7 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 100
    (3) 3.3V (DV33, C11) (4) 2.5V (DV25, C185) CONFIDENTIAL - DO NOT COPY Page 9-8 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 101
    (5) 1.8V (DV18, C64) (6) 1.25V (+1V25_DDR, C148) CONFIDENTIAL - DO NOT COPY Page 9-9 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 102
    (7) 1.2V (DV12, C26) CONFIDENTIAL - DO NOT COPY Page 9-10 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 103
    2. Clock Timing (1) MT5351 Clock Timing (U10 B2-OXTALI) (2) MT5111 Clock Timing (U9 97-XTAL1 / 96-XTAL2) Ch1 - XTAL1 / Ch2 - XTAL2 CONFIDENTIAL - DO NOT COPY Page 9-11 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 104
    (3) Memory Clock Timing (U13-45, MEM_CLKA) (4) Memory Clock Timing (U12-45, MEM_CLKA) CONFIDENTIAL - DO NOT COPY Page 9-12 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 105
    ? Ye U9 no data out? Ye Ye U9 no data in? N0 1. Is Power board output +5V? 2. Is J1 connector good? 3. Is DC-DC OK? 4. Is U4 (3.3V) working ok? It is in power saving N0 1. Check video cable 2. Is the timing supported? 3. Check sync input 4. Check VGASOG rout if analog (SOG) N0 It means
  • Vizio P42HDTV10A | Service Manual - Page 106
    U20 output Ye LVDS output Ye 1.Chcak J6 Connect is good? 2.Is panel working ok? N0 1.Check video 2.Check DVD player N0 1.Check P2 signal 2.Check signal between P2 and U20 (IF AV1/AV2 mode) 3.Check Tuner &U20 (IF TV N0 mode) 1.Check signal between U20 and U9 N0 1.Check signal between U20
  • Vizio P42HDTV10A | Service Manual - Page 107
    Ye U9 input Ye LVDS output Ye 1.Is J6 connected good? END N0 1.Check video 2.Check host's setting N0 1.Check signal between P8&U21 N0 1.Check signal between U21&U9 2.Check U9 Clock (27MHZ) N0 1.Check U9 2.Check U9 power 3.3V 1.8V CONFIDENTIAL - DO NOT COPY Page 10-3 File No. SG-0184
  • Vizio P42HDTV10A | Service Manual - Page 108
    (HDMI) IS NOT DISPLAY CORRECTLY Start Input signal Ye U16 input Ye U16 no data Ye 1.Is J6 connected good? 2.Is panel working ok? N0 1.Check video 2.Check host's setting N0 1.Check p1 connect 2.Check signal between P1 and U16 N0 1.Check U16 power 2.Check between signal U16 and U9 END
  • Vizio P42HDTV10A | Service Manual - Page 109
    TROUBLE OF DC-DC CONVERTER Start J1 PIN 9,10,11 Ye J1 PIN 2,3,4,5 Ye U7 pin 5 6 7 8 Ye U4 pin2 Ye U6 pin 3 Ye U14 pin2 Ye U5 pin2 U13 pin2 END The voltage is about + 5V N0 1.Check power board 2.Check power cable connection J1 N0 The voltage is about + 12V while power switch on 1.J1
  • Vizio P42HDTV10A | Service Manual - Page 110
    TROUBLE OF DDC READING Start Analog DDC Ye HDMIDDC Ye END N0 Support DDC1/2B 1.Analog cable ok? 2.Check signal (U18 to P3) 3.Check U18 Voltage 4.Is compliant protocol? N0 Support DDC1/2B 1.Analog cable ok? 2.Check signal (U17 to P1) 3.Check U17 Voltage 4.Is compliant protocol?
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  • Vizio P42HDTV10A | Service Manual - Page 112
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