Acer Aspire R3610 Acer Aspire R3610 Series Service Guide - Page 44

Optional Feature Show message for entering AWDFLASH.EXE from FDD optional

Page 44 highlights

Checkpoint 4Ch 4Dh 4Eh 4Fh 50h 51h 52h 53h 54h 55h 56h 57h 58h 59h 5Ah 5Bh 5Ch 5Dh 5Eh 5Fh 60h 61h 62h 63h 64h 65h 66h 67h 68h Description Reserved Reserved 1. Program MTRR of M1 CPU. 2. Initialize L2 cache for P6 class CPU & program CPU with proper cacheable range. 3. Initialize the APIC for P6 class CPU. 4. On MP platform, adjust the cacheable range to smaller one in case the cacheable ranges between each CPU are not identical. Reserved Initialize USB Reserved Test all memory (clear all extended memory to 0) Reserved Reserved Display number of processors (multi-processor platform) Reserved 1. Display PnP logo 2. Early ISA PnP initialization -Assign CSN to every ISA PnP device. Reserved Initialize the combined Trend Anti-Virus code. Reserved (Optional Feature) Show message for entering AWDFLASH.EXE from FDD (optional) Reserved 1. Initialize Init_Onboard_Super_IO switch. 2. Initialize Init_Onboard_AUDIO switch. Reserved Reserved Okay to enter Setup utility; i.e. not until this POST stage can users enter the CMOS setup utility. Reserved Reserved Reserved Reserved Initialize PS/2 Mouse Reserved Prepare memory size information for function call: INT 15h ax=E820h Reserved 37 Chapter 4

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