Acer S2W 3300U Service Manual - Page 26

Resume State: Low Speed Fill Speed Start of Packet (SOP) Differential "1" and D+ > VSE(max.) and D+ < VSE(min.) Differential "0" and D- > VSE(max.) and D- < VSE(min.) Data lines switch from Idle to K State End of Packet ( EOP) D+ and D- < VSE(min) for 2 bit times1 follow by an idle for 1 bit time D+ and D- < VSE(min) for ≥ 1 bit times2 follow by J State Disconnect (Upstream only) (n.a.) D+ and D- < VSE(max) for ≥ 2.5µs Connect (Upstream only) (n.a.) D+ and D- > VSE(max) for ≥ 2.5µs Reset (Downstream only) D+ and D- < VSE(min) for 10ms D+ and D- < VSE(min) for ≥ 2.5 µs (must be recognized within 5.5µs)3 Note1 : The width of EOP is defined in bit times relative to the speed of transmission Note2 : The width of EOP is defined in bit times relative to the device type receiving the EOP Note3 : The width apply to an active device that is not in the suspend state The J and K data states are the two logical level used to communixate differential data in the system. Differential signaling is measured from the point where the data line signals cross over. Differential data signaling is not concerned with the level at which the signals cross, as long as it is within the common mode range. When the bus is not in the differential signal mode, the data lines have to be outside the VSE switching threshold range to be valid, as in the idle and resume state. Note that the idle and resume states logically equivalent to the J and K states respectively.