Acer Veriton 7500G Veriton 3500G/5500G/7500G Service Guide - Page 74
Parameter, Description, Option, By SPD, Enabled, Disabled, 128MB, register, FWH, and LPC I/F accesses.
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. Parameter DRAM Timing Selectable Description SDRAM Timing By SPD Manual Option CAS Latency Time Active to Precharge Delay DRAM RAS #to CAS# Delay DRAM RAS# Precharge The default setting by your DRAM's SPD. The default setting by your DRAM's SPD. The default setting by your DRAM's SPD. The default setting by your DRAM's SPD. Memory Frequency for Memory frequency default setup. System BIOS Cacheable E.F segment shadow RAM cacheable. Video BIOS Cacheable C segment shadow RAM cacheable. Video RAM Cacheable A.B segment shadow RAM cacheable. Memory Hole at 15M-16M The system will reserve 15-16 MB address for the add-on card. Delayed Transaction ICH4 enables delayed transactions for internal register, FWH, and LPC I/F accesses. Delay Prior to Thermal Enables Pentium 4 thermal function - 16 miuntes after POST.(only for ACPI OS) AGP Aperture Size (MB) Aperture size: the size of the system memory for AGP card. Options to decide how many size for AGP card. On-Chip Video Window size Aperture size for on-board CPU. On-Chip Frame Buffer size Frame buffer size for on-chip VGA. 1.5/2/2.5/3 7/6/5 3/2 3/2 Auto/ DDR200/DDR266 Enabled/Disabled Enabled/Disabled Disabled/Enabled Disabled/Enabled Enabled/Disabled 16/4/8/32 minutes 64/4/8/16/32/128/256 128MB/64MB/Disabled 8MB/1MB/512MB Integrated Peripherals 64 Veriton 3500/5500/7500