Intel BX80562Q6600 Data Sheet

Intel BX80562Q6600 - Core 2 Quad 2.4 GHz Processor Manual

Intel BX80562Q6600 manual content summary:

  • Intel BX80562Q6600 | Data Sheet - Page 1
    Intel® Core™2 Extreme Quad-Core Processor QX6000Δ Sequence and Intel® Core™2 Quad Processor Q6000Δ Sequence Datasheet -on 65 nm Process in the 775-land LGA Package supporting Intel® 64 architecture and Intel® Virtualization Technology± August 2007 Document Number: 315592-005
  • Intel BX80562Q6600 | Data Sheet - Page 2
    changes to them. The Intel® Core™2 Extreme quad-core processor QX6000 sequence and Intel® Core™2 quad processor Q6000 sequence may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Contact your local Intel sales office or your
  • Intel BX80562Q6600 | Data Sheet - Page 3
    Contents 1 Introduction ...9 1.1 Terminology ...9 1.1.1 Processor Terminology 10 1.2 References ...11 2 Electrical Specifications 13 2.1 Power and Ground Lands 13 2.2 Decoupling Guidelines 13 2.2.1 VCC Decoupling 13 2.2.2 VTT Decoupling 13 2.2.3 FSB Decoupling 14 2.3 Voltage Identification
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    Requirements 90 7.2.1 Fan Heatsink Power Supply 90 7.3 Thermal Specifications 92 7.3.1 7.3.2 7.3.3 Boxed Processor Cooling Requirements 92 Fan Speed Control Operation (Intel® Core™2 Extreme processors only) .........94 Fan Speed Control Operation (Intel® Core™2 Quad processor 94 8 Debug
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    (Top View 89 25 Space Requirements for the Boxed Processor (Overall View 89 26 Boxed Processor Fan Heatsink Power Cable Connector Description 91 27 Baseboard Power Header Placement Relative to Processor Socket 92 28 Boxed Processor Fan Heatsink Airspace Keepout Requirements (Side 1 View 93 29
  • Intel BX80562Q6600 | Data Sheet - Page 6
    130 W Processors 73 28 Thermal Profile for 105 W Processors 74 29 Thermal Profile 95 W Processors 75 30 GetTemp0() and GetTemp1() Error Codes 81 31 Power-On Configuration Option Signals 83 32 Fan Heatsink Power and Signal Specifications 91 33 Fan Heatsink Power and Signal Specifications 95
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    29, "Fan Heatsink Power and Signal Specifications". • Added specifications for the Intel® Core™2 Quad Processor Q6700 and Intel® Core™2 Extreme quad-core processor QX6850 • Added Intel® Core™2 Quad Processor Q6600 for 775_VR_CONFIG_05A • Added Intel® Core™2 Extreme quad-core processor QX6850 • Added
  • Intel BX80562Q6600 | Data Sheet - Page 8
    (Intel® Core™2 Extreme Quad-Core Processor QX6700 and Intel® Core™2 Quad Processor Q6700 only) • Available at 2.40 GHz (Intel® Core™2 Quad Processor Q6600 only) • Available at 2.93 GHz (Intel® Core™2 Extreme Quad-Core Processor QX6800 only) • Enhanced Intel Speedstep® Technology • Supports Intel® 64
  • Intel BX80562Q6600 | Data Sheet - Page 9
    and Intel® Core™2 quad processor Q6000 sequence are the first desktop quad-core processors that combine the performance and power efficiencies of four low-power microarchitecture cores to enable a new level of multi-tasking, multi-media, and gaming experiences. They are 64-bit processors that
  • Intel BX80562Q6600 | Data Sheet - Page 10
    and Intel® Core™2 quad processor Q6000 sequence. The processor is a single package that contains one or more execution units. • Keep-out zone - The area on or near the processor that system design can not utilize. • Processor core - Processor core die with integrated L2 cache. • LGA775 socket
  • Intel BX80562Q6600 | Data Sheet - Page 11
    Specification Update Intel® Core™2 Extreme Quad-Core Processor and Intel® Core™2 Quad Processor Thermal and Mechanical Design Guidelines Voltage Regulator-Down (VRD) 11.0 Processor Power Delivery Design Guidelines For Desktop LGA775 Socket Balanced Technology Extended (BTX) System Design Guide Intel
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    Introduction 12 Datasheet
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    Regulator-Down (VRD) 11.0 Processor Power Delivery Design Guidelines For Desktop LGA775 Socket. VTT Decoupling Decoupling must be provided on the motherboard. Decoupling solutions must be sized to meet the expected load. To insure compliance with the specifications, various factors associated with
  • Intel BX80562Q6600 | Data Sheet - Page 14
    to the Intel® Core™2 Extreme Quad-Core Processor QX6000 Sequence and Intel® Core™2 Quad Processor Q6000 Sequence Specification Update for further details on specific valid core frequency and VID values of the processor. Note that this differs from the VID employed by the processor during a power
  • Intel BX80562Q6600 | Data Sheet - Page 15
    Electrical Specifications Table 2. Voltage Identification Definition VID6 VID5 VID4 VID3 VID2 VID1 VCC_MAX 1 1 1 1 0 1 0.8500 1 1 1 1 0 0 0.8625 1 1 1 0 1 1 0.8750 1 1 1 0 1 0 0.8875 1 1 1 0 0 1 0.9000 1 1 1 0 0 0 0.9125 1 1 0 1 1 1 0.9250 1 1 0 1 1
  • Intel BX80562Q6600 | Data Sheet - Page 16
    . A resistor must be used when tying bidirectional signals to power or ground. When tying any signal to power or ground, a resistor will also allow for system testability. Resistor values should be within ± 20% of the impedance of the motherboard trace for front side bus signals. For unused GTL
  • Intel BX80562Q6600 | Data Sheet - Page 17
    Core voltage with respect to VSS -0.3 1.55 V - VTT FSB termination voltage with respect to VSS -0.3 1.55 V - TC Processor device. For functional operation, Refer to the processor case temperature specifications. 4. This rating applies to the processor and does not include any tray or
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    may have different settings within the VID range. Note this differs from the VID employed by the processor during a power management event (Thermal Monitor 2, Enhanced Intel SpeedStep® Technology, or Extended HALT State). 4. These voltages are targets only. A variable voltage source should exist on
  • Intel BX80562Q6600 | Data Sheet - Page 19
    total current drawn from VTT plane by only the processor. This specification does not include the current coming from RTT (through the signal line). Refer to the Voltage Regulator-Down (VRD) 11.0 Processor Power Delivery Design Guidelines For Desktop LGA775 Socket to determine the total ITT drawn by
  • Intel BX80562Q6600 | Data Sheet - Page 20
    except for overshoot allowed as shown in Section 2.5.3. 2. This loadline specification shows the deviation from the VID set point. 3. The loadlines specify processor VCC and VSS lands. Refer to the Voltage Regulator-Down (VRD) 11.0 Processor Power Delivery Design Guidelines For Desktop LGA775
  • Intel BX80562Q6600 | Data Sheet - Page 21
    NOTES: 1. VOS is measured overshoot voltage. 2. TOS is measured time duration above VID. Die Voltage Validation Overshoot events on processor must meet the specifications in Table 6 when measured across the VCC_SENSE and VSS_SENSE lands. Overshoot events that are < 10 ns in duration may be
  • Intel BX80562Q6600 | Data Sheet - Page 22
    defined as VTT. Because platforms implement separate power planes for each processor (and chipset), separate VCC and VTT supplies motherboard (see Table 14 for GTLREF specifications). Termination resistors (RTT) for GTL+ signals are provided on the processor silicon and are terminated to VTT. Intel
  • Intel BX80562Q6600 | Data Sheet - Page 23
    Specifications Table 7. . Table 8. . Table 9. FSB Signal Groups (Sheet 2 of 2) Signal Group Type Signals1 CMOS Open Drain Output Open Drain Input/Output FSB Clock Clock Power In processor systems where no debug port is implemented on the system board, these signals are used to support a
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    timing requirements for entering and leaving the low power states. 2.6.3 Table 10. Processor DC Specifications The processor DC specifications in this section are defined at the processor core (pads) unless otherwise stated. All specifications apply to all frequencies and cache sizes unless
  • Intel BX80562Q6600 | Data Sheet - Page 25
    100 µA 9 NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. VIL is defined as the voltage range affect VTT min/max specifications. Refer to Table 4 for VTT specifications. 2. The leakage specification applies to powered devices on the PECI
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    are to VSS. Clock Specifications 2.7.1 Table 15. Front Side Bus Clock (BCLK[1:0]) and Processor Clocking BCLK[1:0] directly controls the FSB interface speed as well as the core frequency of the processor. As in previous generation processors, the processor's core frequency is a multiple of
  • Intel BX80562Q6600 | Data Sheet - Page 27
    operate at the same frequency. The Intel® Core™2 Extreme Quad-Core processor QX6800, QX6700 and Intel® Core™2 Quad processors Q6600 and Q6700 operate at a 1066 MHz FSB frequency (selected by a 266 MHz BCLK[1:0] frequency). The Intel® Core™2 Extreme Quad-Core processor QX6850 operates at 1333 MHz FSB
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    : BCLK[1:0] Rise and Fall Slew Rate 2.5 - 8 V/nS 5 5 T6: Slew Rate Matching N/A N/A 20 % 6 NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor core frequencies based on a 266 MHz BCLK[1:0]. 2. Duty Cycle (High time/Period) must be between 40 and 60
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    T5: BCLK[1:0] Rise and Fall Slew Rate 2.5 - 8 V/nS 5 6 T6: Slew Rate Matching N/A N/A 20 % 7 NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor core frequencies based on a 333 MHz BCLK[1:0]. 2. Duty Cycle (High time/Period) must be between 40 and 60
  • Intel BX80562Q6600 | Data Sheet - Page 30
    4. Differential Clock Crosspoint Specification Crossing Point (mV) 650 600 550 500 550 + 0.5 (VHavg - 700) 450 550 mV 400 300 + 0.5 (VHavg - 700) 350 300 300 mV 250 200 660 670
  • Intel BX80562Q6600 | Data Sheet - Page 31
    Package Mechanical Specifications 3 Package Mechanical Specifications Figure 6. The processor is packaged in a Flip-Chip Land Grid Array (FC-LGA6) package that interfaces with the motherboard via an LGA775 socket. The package consists of a processor core mounted on a substrate land-carrier. An
  • Intel BX80562Q6600 | Data Sheet - Page 32
    Figure 7. Processor Package Drawing Sheet 1 of 3 Package Mechanical Specifications 32 Datasheet
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    Package Mechanical Specifications Figure 8. Processor Package Drawing Sheet 2 of 3 Datasheet 33
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    Figure 9. Processor Package Drawing Sheet 3 of 3 Package Mechanical Specifications 34 Datasheet
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    maximum force that can be applied by a heatsink retention clip. The clip must also provide the minimum specified load on the processor package. 3. These specifications are based on limited testing for design characterization. Loading limits are for the package only and do not include the limits of
  • Intel BX80562Q6600 | Data Sheet - Page 36
    can be inserted into and removed from a LGA775 socket 15 times. The socket should meet the LGA775 requirements detailed in the LGA775 Socket Mechanical Design Guide. 3.6 Processor Mass Specification The typical mass of the processor is 21.5 g [0.76 oz]. This mass [weight] includes all the
  • Intel BX80562Q6600 | Data Sheet - Page 37
    Package Mechanical Specifications Figure 11. Processor Top-Side Markings Example for 1333 MHz Processors INTEL M ©'05 QX6850 INTEL® CORE™2 EXTREME SLxxx [COO] 3.00GHZ/8M/1333/05B [FPO] e4 ATPO S/N Datasheet 37
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    Package Mechanical Specifications 3.9 Processor Land Coordinates . Figure 12. Figure 12 shows the top view of the processor land coordinates. The coordinates are referred to throughout the document to identify processor lands. Processor Land Coordinates and Quadrants (Top View) V /V CC SS 30 29
  • Intel BX80562Q6600 | Data Sheet - Page 39
    and Signal Descriptions 4 4.1 Land Listing and Signal Descriptions This chapter provides the processor land assignment and signal descriptions. Processor Land Assignments This section contains the land listings for the processor. The land-out footprint is shown in Figure 13 and Figure 14. These
  • Intel BX80562Q6600 | Data Sheet - Page 40
    Land Listing and Signal Descriptions Figure 13. land-out Diagram (Top View - Left Side) 30 29 28 AN VCC VCC VSS 27 VSS 26 25 24 23 22 21 20 VCC VCC VSS VSS VCC VCC VSS AM VCC AL VCC AK VSS AJ VSS AH VCC AG VCC AF VSS AE VSS AD VCC AC VCC AB VSS VCC VCC VSS VSS VCC VCC VSS VSS VCC
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    Land Listing and Signal Descriptions Figure 14. 14 13 VCC VSS VCC VCC VCC VCC VCC VCC VCC VCC VSS VSS VSS VSS VSS VSS VSS VSS VCC VCC VSS VSS land-out Diagram (Top View - Right Side) 12 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VSS 11 10 VCC VSS VCC VCC VCC VCC VCC VCC VCC VCC VSS VSS VSS
  • Intel BX80562Q6600 | Data Sheet - Page 42
    /Output G8 Common Clock Input F3 Common Clock Input/Output G29 Power/Other Output H30 Power/Other Output G30 Power/Other Output A13 Power/Other Input T1 Power/Other Input G2 Power/Other Input R1 Power/Other Input B13 Power/Other Input B4 Source Synch Input/Output C5 Source Synch
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    Synch Input/Output Y1 Power/Other J2 Power/Other E24 Power/Other H29 Power/Other Y3 Power/Other AE3 Power/Other E5 Power/Other F6 Power/Other J3 Power/Other A24 Power/Other AK1 Power/Other AL1 Power/Other E29 Power/Other U2 Power/Other U3 Power/Other J16 Power/Other Datasheet 43
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    RESERVED F23 RESERVED F29 RESERVED G6 RESERVED N4 RESERVED N5 RESERVED P5 RESERVED V2 RESET# G23 Common Clock RS0# B3 Common Clock RS1# F5 Common Clock RS2# A3 Common Clock SKTOCC# AE8 Power/Other SMI# P2 Asynch CMOS STPCLK# M3 Asynch CMOS TCK AE1 TAP TDI AD1 TAP TDI_M W2
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    AJ15 Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power
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    Power/Other AN19 Power/Other AN21 Power/Other AN22 Power/Other AN25 Power/Other AN26 Power/Other AN29 Power/Other AN30 Power/Other AN8 Power/Other AN9 Power/Other J10 Power/Other J11 Power/Other J12 Power/Other J13 Power/Other J14 Power/Other J15 Power/Other J18 Power/Other J19 Power/Other J20 Power
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    /Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power
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    AC3 Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power
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    AK29 Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power
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    /Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power
  • Intel BX80562Q6600 | Data Sheet - Page 51
    F27 Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power
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    # Source Synch Input/Output A5 D04# Source Synch Input/Output A6 VSS Power/Other A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 D07# DBI0# VSS D08
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    VTT Source Synch Input/Output Source Synch Input/Output Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Common Clock Input/Output Power/Other Common Clock Input/Output Power/Other Power/Other Source Synch Input/Output Source Synch Input
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    Power/Other Clock Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power
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    Input/Output A03# Source Synch Input/Output VSS Power/Other VSS Power/Other VCC Power/Other VSS Power/Other VSS Power/Other VSS Power/Other VSS Power/Other VSS Power/Other VSS Power/Other VSS Power/Other VSS Power/Other VSS Power/Other THERMTRIP# Asynch CMOS Output STPCLK
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    Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Input Power/Other Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power
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    Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Output Power/Other Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power
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    Power/Other Output Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power
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    Input/Output Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other
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    /Output Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power
  • Intel BX80562Q6600 | Data Sheet - Page 61
    /Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power
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    bus. Asserting A20M# emulates the 8086 processor's address wraparound at the 1-MB boundary. Assertion of A20M# is only supported in real mode. A20M# is an asynchronous signal. However, to ensure recognition of this signal following an Input/Output write instruction, it must be valid along with the
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    processor FSB agents. BPM[3:0]# are associated with core 0. BPMb[3:0]# are associated with core 1. BPM4# provides PRDY# (Probe Ready) functionality for the TAP port. PRDY# is a processor system and is used by the processor to request the bus. During power-on configuration this signal is sampled to
  • Intel BX80562Q6600 | Data Sheet - Page 64
    data transfer. D[63:0]# are quad-pumped signals and will, half the data bits, within a 16-bit group, would processor FSB to indicate that the data bus is in use. The data bus is released after DBSY# is de-asserted. This signal must connect the appropriate pins/lands on all processor FSB agents. 64
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    event functionality, including the identification of support of the feature and enable/disable information, refer to volume 3 of the Intel Architecture Software Developer's Manual and the Intel Processor Identification and the CPUID Instruction application note. Input GTLREF[3:0] determine the
  • Intel BX80562Q6600 | Data Sheet - Page 66
    and continue to execute noncontrol floatingpoint instructions. If IGNNE# is de-asserted, the processor generates an exception on a noncontrol floating-point instruction if a previous floating-point instruction caused an error. IGNNE# has no effect when the NE bit in control register 0 (CR0) is set
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    PROCHOT# (Processor Hot) will go active when the processor temperature monitoring sensor detects that the processor has reached Power Good) is a processor input. The processor requires this signal to be a clean indication that the clocks and power supplies are stable and within their specifications
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    TDO and TDI_M provide the serial output needed for JTAG specification support. TDO connects to core 1. TDO_M connects to core 0. Input TESTHI[13,11:10,7:0] must be connected to the processor's appropriate power source (refer to VTT_OUT_LEFT and VTT_OUT_RIGHT signal description) through a resistor
  • Intel BX80562Q6600 | Data Sheet - Page 69
    Processor Power Delivery Design Guidelines For Desktop LGA775 Socket. Output VID[7:0] (Voltage ID) signals are used to support automatic selection of power becomes valid. The VID signals are needed to support the processor voltage specification variations. See Table 2 for definitions of these
  • Intel BX80562Q6600 | Data Sheet - Page 70
    impedance connection to processor core VSS. It Processor Power Delivery Design Guidelines For Desktop LGA775 Socket. Miscellaneous voltage supply. The VTT_OUT_LEFT and VTT_OUT_RIGHT signals are included to provide a voltage supply for some signals that require termination to VTT on the motherboard
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    long-term reliability of Intel processor-based systems, the system/processor thermal solution should be designed such that the processor remains within the minimum and maximum case temperature (TC) specifications when operating at or below the Thermal Design Power (TDP) value listed per frequency
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    Specification is at 50 °C TC and typical voltage loadline. 2. 775_VR_CONFIG_05B guidelines provide a design target for meeting future thermal requirements. 3. Thermal Design Power (TDP) should be used for processor thermal solution design targets. The TDP is not the maximum power that the processor
  • Intel BX80562Q6600 | Data Sheet - Page 73
    Thermal Specifications and Design Considerations Table 27. Thermal Profile for 130 W Processors Power (W) 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 Maximum Tc (°C) 42.4 42.7 43.1 43.4 43.8 44.1 44.4 44.8 45.1 45.5 45.8 46.1 46.5 46.8 47.2 47.5 47.8 Power (W) 34 36 38 40 42 44 46 48 50 52
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    Thermal Specifications and Design Considerations Table 28. Thermal Profile for 105 W Processors Power Maximum (W) Tc (°C) Power Maximum (W) Tc (°C) 0 43.3 2 43 51.2 46 51.6 48 51.9 50 52.3 52 52.7 54 53.0 Power (W) 56 58 60 62 64 66 68 70 72 74 76 78 80 82 Maximum Tc (°C) 53.4
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    Thermal Specifications and Design Considerations Table 29. Thermal Profile 95 W Processors Power Maximum (W) Tc (°C) Power Maximum (W) Tc (°C) 0 44.4 2 45.0 4 45.5 6 46.1 8 46.6 10 47.2 12 47.8 14 48.3 16 48.9 18 49.4 20 50.0 22 50.6 24 51.1 26 51.7
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    its maximum operating temperature. The TCC reduces processor power consumption by modulating (starting and stopping) the internal processor core clocks. The Thermal Monitor feature must be enabled for the processor to be operating within specifications. The temperature at which Thermal Monitor
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    codes to reach the target operating voltage. Each step will likely be one VID table entry (see Table 4). The processor continues to execute instructions during the voltage transition. Operation at the lower voltage reduces the power consumption of the processor. A small amount of hysteresis has been
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    Thermal Specifications and Design Considerations Figure 19. processor temperature. If bit 4 of the IA32_CLOCK_MODULATION MSR is set to a '1', the processor will immediately reduce its power consumption via modulation (starting and stopping) of the internal core clock, independent of the processor
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    output, PROCHOT# (Processor Hot) will go active when the processor temperature monitoring sensor detects that one or both cores has reached its maximum the power delivery circuitry to operate within its temperature specification even while the processor is operating at its Thermal Design Power. With
  • Intel BX80562Q6600 | Data Sheet - Page 80
    Thermal Specifications and Design Considerations 5.3 Platform Environment Control Interface (PECI) 5.3.1 Introduction PECI offers an interface for thermal monitoring of Intel processor and chipset components. It uses a single wire; thus, alleviating routing congestion issues. PECI uses CRC
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    thus given operating conditions that fall under the specification, the PECI will always respond to requests and implement a default power-on condition that ensures proper processor operation during the GetTemp1() Error Code Support The error codes supported for the processor GetTemp0() and GetTemp1
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    Thermal Specifications and Design Considerations 82 Datasheet
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    3. Disabling of any of the cores within the processor must be handled by configuring the EXT_CONFIG Model Specific Register (MSR). This MSR will allow for the disabling of a single core per die within the package. 6.2 Clock Control and Low Power States The processor allows the use of AutoHALT and
  • Intel BX80562Q6600 | Data Sheet - Page 84
    # will cause the processor to immediately initialize itself. The return from a System Management Interrupt (SMI) handler can be to either Normal Mode or the HALT Power Down state. See the Intel Architecture Software Developer's Manual, Volume III: System Programmer's Guide for more information. 84
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    State. More details on which processor frequencies will support this feature will be provided in future releases of the Intel® Core™2 Extreme Quad-Core Processor QX6700 and Intel® Core™2 Quad Processor Q6000 Sequence Specification Update when available. The processor will automatically transition to
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    will stay in this state until the snoop on the FSB has been serviced (whether by the processor or another agent on the FSB). After the snoop is serviced, the processor will return to the Stop Grant state or HALT Power Down state, as appropriate. Extended HALT Snoop State The Extended HALT Snoop
  • Intel BX80562Q6600 | Data Sheet - Page 87
    Boxed Processor Specifications 7 Boxed Processor Specifications The processor will also be offered as an Intel boxed processor. Intel boxed processors are intended for system integrators who build systems from baseboards and standard components. The boxed processor will be supplied with a cooling
  • Intel BX80562Q6600 | Data Sheet - Page 88
    This section documents the mechanical specifications of the boxed processor. The boxed processor will be shipped with an unattached fan heatsink. Figure 22 shows a mechanical representation of the boxed processor. Figure 23. Clearance is required around the fan heatsink to ensure unimpeded airflow
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    Boxed Processor Specifications Figure 24. Space Requirements for the Boxed Processor (Top View) Figure 25. NOTES: 1. Diagram does not show the attached hardware for the clip design and is provided only as a mechanical representation. Space Requirements for the Boxed Processor (Overall View)
  • Intel BX80562Q6600 | Data Sheet - Page 90
    V power supply. A fan power cable will be shipped with the boxed processor to draw power from a power header on the baseboard. The power cable connector and pinout are shown in Figure 26. Baseboards must provide a matched power header to support the boxed processor. Table 32 contains specifications
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    Boxed Processor Specifications Figure 26. Boxed Processor Fan Heatsink Power Cable Connector Description Pin Signal 1 GND 2 +12 V 3 SENSE 4 CONTROL Straight square pin, 4-pin terminal housing with polarizing ribs and friction locking ramp. 0.100" pitch, 0.025"
  • Intel BX80562Q6600 | Data Sheet - Page 92
    Processor Specifications Figure 27. Baseboard Power Header Placement Relative to Processor Socket 7.3 7.3.1 Thermal Specifications This section describes the cooling requirements of the fan heatsink solution used by the boxed processor. Boxed Processor Cooling Requirements The boxed processor
  • Intel BX80562Q6600 | Data Sheet - Page 93
    Boxed Processor Specifications Figure 28. Boxed Processor Fan Heatsink Airspace Keepout Requirements (Side 1 View) Figure 29. Boxed Processor Fan Heatsink Airspace Keepout Requirements (Side 2 View) Datasheet 93
  • Intel BX80562Q6600 | Data Sheet - Page 94
    system integrator. The motherboard must supply a constant +12 V to the processor's power header to ensure proper operation of the fan for the boxed processor. See Table 32 for specific requirements. Fan Speed Control Operation (Intel® Core™2 Quad processor) If the boxed processor fan heatsink 4-pin
  • Intel BX80562Q6600 | Data Sheet - Page 95
    the motherboard is designed with a fan speed controller with PWM output (CONTROL see Table 32) and remote thermal diode measurement capability the boxed processor will operate as follows: As processor power has increased the required thermal solutions have generated increasingly more noise. Intel
  • Intel BX80562Q6600 | Data Sheet - Page 96
    is automatically varied based on the Tinlet temperature measured by a thermistor located at the fan inlet. For more details on specific motherboard requirements for 4-wire based fan speed control refer to the appropriate Thermal and Mechanical Design Guidelines (see Section 1.2). § § 96 Datasheet
  • Intel BX80562Q6600 | Data Sheet - Page 97
    Specifications 8 Debug Tools Specifications 8.1 8.1.1 8.1.2 Logic Analyzer Interface (LAI) Intel is working with two logic analyzer vendors to provide logic analyzer interfaces (LAIs) for use in debugging systems. Tektronix and Agilent should be contacted to get specific the processor's heatsink
  • Intel BX80562Q6600 | Data Sheet - Page 98
    Debug Tools Specifications 98 Datasheet
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Document Number: 315592-005
Intel
®
Core™2 Extreme Quad-Core
Processor QX6000
Δ
Sequence and
Intel
®
Core™2 Quad Processor
Q6000
Δ
Sequence
Datasheet
—on 65 nm Process in the 775-land LGA Package supporting
Intel
®
64
architecture and Intel
®
Virtualization Technology
±
August 2007