Intel SC5650BCDP Technical Product Specification

Intel SC5650BCDP Manual

Intel SC5650BCDP manual content summary:

  • Intel SC5650BCDP | Technical Product Specification - Page 1
    Intel®Server Board S5500BC Technical Product Specification Intel order number: E42249-009 Revision 1.8 June 2011 Enterprise Platforms and Services Division - Marketing
  • Intel SC5650BCDP | Technical Product Specification - Page 2
    Revision History Intel®Server Board S5500BC TPS Date January 2009 February, 2009 April, 2009 May Requirements.  Updated section 3.2.1 supported memory.  Corrected Post Code Diagnose LED color information.  Added support for new board and Intel® Xeon® processors 5600 series  Update section 10
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    absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall . Current characterized errata are available on request. Intel Corporation server baseboards support peripheral components and contain a number of high
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    2.2 Server Board Layout 4 2.2.1 Server Board Connector and Component Layout 4 2.2.2 Server Board Mechanical Drawing 6 2.2.3 Intel® Light-Guided Diagnostic LED Locations 13 2.2.4 External I/O Connector Locations 14 3. Functional Architecture ...15 3.1 3.1.1 Processor Subsystem 15 Intel
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    Intel®Server Board S5500BC TPS Table of Contents 3.3.5 Intel® Virtualization Technology for Directed I/O (Intel® VT-d) (rev. 2 32 3.4 Intel® 82801Jx I/O Controller Hub (ICH10R 33 3.4.1 PCI and PCI Express* Interfaces 33 3.4.2 Serial ATA II Interface 33 3.4.3 Software RAID Support 34
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    Table of Contents Intel®Server Board S5500BC TPS 4.2.4 Availability ...49 4.2.5 Web Services for Management (WS-MAN 49 4.2.6 Lightweight Directory Authentication Protocol (LDAP 49 4.2.7 Embedded Web server 49 4.3 Console Redirection 50 4.3.1 Serial Configuration Settings 50 4.3.2 SOL,
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    ® Light-Guided Diagnostics 102 8.1 5-Volt Standby LED 102 8.2 System ID and Status LED 102 8.3 DIMM Fault LEDs 103 8.4 Fan Fault LEDs ...104 8.5 Post Code Diagnostic LEDs 104 9. Power and Environmental Specifications 105 9.1 Intel® Server Board S5500BC Design Specifications 105
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    134 Appendix D: POST Code Diagnostic LED Decoder 139 Appendix E: Intel® Server System SR1630BC 143 Appendix F: Supported Intel® Server Chassis SC5650 and Intel® Server System SC5650BCDP ...144 Glossary...145 Reference Documents ...148 viii Intel order number: E42249-009 Revision 1.8
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    Side Keepouts 9 Figure 7. Intel® Server Board S5500BC Board Primary Side Card-Side Keepout Zone 10 Figure 8. Secondary Side Keepout -- Mounting Hole Keepout 11 Figure 9. Secondary Side Keepout - CPU Socket and Rubber Pad Keepout 12 Figure 10. Intel® Light-Guided Diagnostic LED Locations 13
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    Voltage Timing 111 Figure 47. Turn On/Off Timing (Power Supply Signals 112 Figure 48. Diagnostic LED Placement Diagram 139 Figure 49. 1U Intel® Server System SR1630BC Overview 143 Figure 50. 5U Intel® Entry Server Chassis SC5650 Overview 144 x Intel order number: E42249-009 Revision 1.8
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    Intel® Light-Guided Diagnostic LED reference 13 Table 4. External I/O Layout Reference 14 Table 5. Intel® Xeon® Processor 5500 Series Feature Set Overview 16 Table 6. Mixed Processor Configurations 18 Table 7. Supported DDR3 Memory 23 Table 8. Memory Operating Frequency Determination for Intel
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    List of Tables Intel®Server Board S5500BC TPS Table 31. Setup Utility - Add New Boot Option (J5A1, J6A1 96 Table 53. Internal USB Header Pin-out (J1A3, J2A2 96 Table 54. CPU and System Fan Connector Pin-out 97 Table 55. SGPIO connector Pin-out (J1C1 98 Table 56. Chassis Intrusion connector Pin
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    Intel®Server Board S5500BC TPS List of Tables Table 66. Power on loading range 107 Table 67. Voltage Regulation Limits 109 Table 68 Beep Codes 138 Table 80. POST Progress Code LED Example 139 Table 81. Diagnostic LED POST Code Decoder 140 Revision 1.8 Intel order number: E42249-009 xiii
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    List of Tables Intel®Server Board S5500BC TPS < This page intentionally left blank. > xiv Intel order number: E42249-009 Revision 1.8
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    the responsibility of the system integrator who chooses not to use Intel developed server building blocks to consult vendor datasheets and operating parameters to determine the amount of air flow required for their specific application and environmental conditions. Intel Corporation cannot be held
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    Board S5500BC TPS 2. Product Overview The Intel® Server Board S5500BC are monolithic printed circuit board (PCB) that supports the high-density 1U rack-mount server and 5U pedestal server market. 2.1 Feature Set Feature Processors Memory Chipset Onboard Connectors / Headers Table 1: Feature
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    RJ-45 Connector. Fans USB Power Supply System Management Five 4-pin fan headers supporting two processor fans and three system fans  Four USB 2.0 Ports connected to the Server Rear Panel  Four USB 2.0 Ports connected to Headers on the motherboard  One USB 1.1 Port connected to the Integrated
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    Product Overview 2.2 Server Board Layout Intel®Server Board S5500BC TPS Figure 1. Intel® Server Board S5500BC Picture 2.2.1 Server Board Connector and Component Layout Figure 2 shows the board layout of the server board. Each connector and major component is identified by a number or letter, and a
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    R Main power connector S DIMM sockets for Channel A & B (Supports CPU_1) T Power Supply Auxiliary Connector U SSI 24-pin Front Panel connector V System fan 2 header W CPU_1 fan header Y CPU_1 Socket X CPU Power Connector Z Intel® IOH 5500 chipset Revision 1.8 Intel order number: E42249-009 5
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    Overview AA CPU Socket 2 Description CC System fan 1 header EE SATA SGPIO GG SATA 1 Intel®Server Board S5500BC TPS BB CPU 2 fan header Description DD DIMM sockets for Channels D and E (Supports CPU_2) FF SATA 0 HH SATA 2 2.2.2 Server Board Mechanical Drawing Figure 3. Key Connector
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    Intel®Server Board S5500BC TPS Product Overview Figure 4. Mounting Hole Location Revision 1.8 Intel order number: E42249-009 7
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    Product Overview Intel®Server Board S5500BC TPS Figure 5. Major Connector Pin-1 Locations 8 Intel order number: E42249-009 Revision 1.8
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    Intel®Server Board S5500BC TPS Product Overview Figure 6. Intel® Server Board S5500BC Board Primary Side Keepouts Revision 1.8 Intel order number: E42249-009 9
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    Product Overview Intel®Server Board S5500BC TPS Figure 7. Intel® Server Board S5500BC Board Primary Side Card-Side Keepout Zone 10 Intel order number: E42249-009 Revision 1.8
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    Intel®Server Board S5500BC TPS Product Overview Figure 8. Secondary Side Keepout -- Mounting Hole Keepout Revision 1.8 Intel order number: E42249-009 11
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    Product Overview Intel®Server Board S5500BC TPS Figure 9. Secondary Side Keepout - CPU Socket and Rubber Pad Keepout 12 Intel order number: E42249-009 Revision 1.8
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    Intel®Server Board S5500BC TPS 2.2.3 Intel® Light-Guided Diagnostic LED Locations Product Overview Figure 10. Intel® Light-Guided Diagnostic LED Locations Table 3. Intel® Light-Guided Diagnostic LED reference Description A Post-Code Diagnostic LEDs C System ID LED E System Fan 3 Fault LED G DIMM
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    External I/O Connector Locations Intel®Server Board S5500BC TPS Figure 11. External I/O Layout Table 4. External I/O Layout Reference Description A Serial Port A C USB Port 6-7 E NIC Port 1 Description B Video D USB Port 8-9 F NIC Port 2 (management port) 14 Intel order number: E42249-009
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    the first generation server/workstation multi-core processor to implement the following key technologies:  Integrated Memory Controller  Point-to-point link interface based on Intel® QuickPath Interconnect (QPI)-formerly known as Common System Interface. The processor is optimized for performance
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    Functional Architecture Intel®Server Board S5500BC TPS Table 5. Intel® Xeon® Processor 5500 Series Feature Set Overview Cache Sizes Feature Data Transfer Rate Multi-Core Support Dual Processor Support Package Intel®Xeon®Processor 5500 Series and 5600 Series Instruction Cache = 32 KB Data Cache
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    Intel®Server Board S5500BC TPS Intel® Xeon® 5500 processor Core- 0 .... Core- 3 Cache Mem I/F CSI Interface Functional Architecture Intel® Xeon® 5500 processor Core- 0 .... Core- 3 Cache CSI Interface Mem I/F Memory Intel® 5500 I/O Hub CSI Interface Memory CSI Link PCI-E PCI-E PCI
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    Board S5500BC TPS The following table describes mixed processor conditions and recommended actions for all Intel® server boards and systems that use the Intel® IOH chipset. Errors fall into one of two categories:  Fatal: If the system can boot, it goes directly to the error manager, regardless
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    BSP. All APs execute a halt instruction with their local interrupts disabled. If the BSP determines an AP exists is a lowerfeatured processor or has a lower value returned by the CPUID function, the BSP switches to the lowest-featured processor in the server. The system management mode (SMM) handler
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    bins, and 4 Cores 1 Turbo bin. If the processor supports this feature (it is not available in all SKUs), processors. The SMBIOS Type 4 structure shows only the installed physical processors; it does not describe the virtual processors. Because some operating systems cannot efficiently use the Intel
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    Functional Architecture 3.1.8 Independent Loading Mechanism (ILM) Back Plate Design Support The Intel® Server board S5500BC complies with Intel's Independent Loading Mechanism (ILM) processor mounting and Unified Retention System (URS) heatsink retention solution. The ILM design allows a bottoms
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    S5500BC TPS Figure 14. ILM Backplate and URS 3.2 Memory Subsystem 3.2.1 Supported Memory The Intel® Xeon® processors 5500 series and 5600 series have an Integrated Memory Controller (IMC). The Intel® Server Board S5500BC memory interface supports two DDR3 channels. Each channel consists of 64 data
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    ® Xeon® Processor 5500 Series and 5600 series. Intel® 5500 IOH supports 4.8 GT/s, 5.86 GT/s, and 6.4 GT/s frequencies for the QPI links. During QPI initialization, the BIOS configures both endpoints of each QPI link to the same supportable speeds for the correct operation. During memory discovery
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    Functional Architecture Intel®Server Board S5500BC TPS The rules for determining the operating frequency of the memory channels are simple, common memory system frequency. Table 8. Memory Operating Frequency Determination for Intel® processor 5500 series IMC Frequency of Installed Processors (
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    Intel®Server Board S5500BC TPS Functional Architecture Table 9. Memory Operating Frequency Determination for Intel® processor 5600 series and 1.5V Memory Modules DIMM Type RDIMM or UDIMM RDIMM RDIMM or UDIMM RDIMM DIMM Populated per Channel 1 1 2 2 IMC Frequency of Installed Processors (1333MHz
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    Functional Architecture Intel®Server Board S5500BC TPS 3.2.2 DIMM Population Requirements DIMMs on this board are organized into physical slots on the DDR3 memory channels divided between two processor sockets. For more information, refer to the following figure. Processor Socket 1 Channel A
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    Intel® Xeon® processor 5500 series and 5600 series to maximize memory support a single DIMM configuration in channel A and Single Channel Mode. You should observe the following general rules when selecting and configuring memory to obtain the best performance from the system. Revision 1.8 Intel
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    not need to be identical. 3.2.4 Memory RAS Features The Intel® server boards S5500BC supports the following memory RAS features:  Channel Independent Mode  Channel Mirroring Mode  Demand and Patrol Scrub The Intel® Xeon® processor 5500 series and 5600 series offer memory RAS at the channel level
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    82 ms with 64 GB of memory. 3.3 Intel®I/O Hub (IOH) 5500 chipset The Intel® I/O Hub (IOH) 5500 chipset component provides a connection point between various I/O components and Intel® QuickPath Interconnect based processors. The following table shows the features supported by the chipset. Table 11
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    network access; and System Defense Feature support enabled by firmware.  Reduced Media Independent Interface (RMII) support.  Supports a SMBus Specification Revision 2.0 slave interface for server management with Packet Error Checking.  Power Management Support  Intel® Virtualization Technology
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    PECI 2.0 Proxy: Intel® Server Platform Services (SPS) offers a means for a BMC without a PECI 2.0 interface to use the ME as a PECI proxy. The BMC on Intel servers already has a PECI 2.0 interface, so this SPS capability is not used. No external IOH memory is required to support the ME SPS functions
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    changed to enable or disable the Virtualization Technology setting in the processor, the user must perform an AC power cycle before the changes take effect. The Intel® IOH 5500 chipset on the Intel® Server Board S5500BC supports Intel® VT-d2 features as outlined:  Builds on the first generation of
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    ports or one x2. Port 6 is multiplexed with a Gigabit LAN Connect Interface. The x4 configuration supports lane reversal. Each root port supports 2.5 Gb/s bandwidth in each direction. Ports 1-4 on the Intel® Server Board S5500BC are grouped together to form a single x4 link connecting to an x4 PCI
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    units including DMA, interrupt controllers, timers, power management, system management, GPIO, and RTC. The LPC bus supports the Integrated BMC, which contains Server Class Super I/O functionality in an integrated subsystem on the Intel® Server Board S5500BC. 3.4.5 Serial Bus (USB) Controller The
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    , Revision 2.0. 3.4.9 System Management Interface Intel® ICH10R on the Intel® Server board S5500BC functions as a SMBus Host Controller that allows the processor to communicate with SMBus slaves. This interface is compatible with most I2C devices. Intel® ICH10R also supports slave functionality
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     TCO Timer: Detects system locks  Process Present Indicator: Determines which processor fetches the first instruction after reset.  ECC Determines system cases. 3.4.12 Unsupported Intel® ICH10R Interfaces The Intel® Server Board S5500BC does not support the following interfaces on the Intel®
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    a relatively small area, so it can be used for server and client configurations as a LAN-on-Motherboard (LOM) design. You can also use the 82574L GbE the entire outgoing packet prior to transmission. The Intel® 82574L GbE PCI-E Network controller supports the following features:  Standard IEEE 802.3
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    hardware features is platform-dependant. The Integrated BMC on the Intel® Server Board S5500BC contains the following integrated functionality: Server Class Super I/O functionality includes:  Keyboard Style/BT interface for BMC support  One Fully Functional Serial Ports, compatible with the 16C550
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    Intel®Server Board S5500BC TPS Functional Architecture  SMI/SCI/PME Support  ACPI Compliant  Up to 16 shared GPIO ports  Programmable Wake-up Event Support  Plug and Play Register Set  Power Supply Control  Watchdog timer compliant with Microsoft SHDG*  LPC to SPI bridge for system BIOS
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    Intel®Server Board S5500BC TPS Remote KVMS Features:  USB 2.0 interface for Keyboard, Mouse, and Remote storage, such as a CD/DVD-ROM and floppy  USB 1.1 interface for PS/2 to USB bridging and remote Keyboard and Mouse  Hardware-based Video Compression and Redirection Logic  Supports
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    Intel®Server Board S5500BC TPS Integrated BMC Block Diagram Functional Architecture USB to Host Code Memory LPC is available from either of available NIC ports in system which can be shared with the host. Only host. For these channels, you can enable support for IPMI-over-LAN and DHCP. For
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    port B, is connected from the Integrated BMC to an onboard, internal 2x5 header. 3.9 Floppy Disk Controller The Intel® Server Board S5500BC does not support a floppy disk controller (FDC) interface, but the system BIOS recognizes USB floppy devices. 42 Intel order number: E42249-009 Revision 1.8
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    Intel®Server Board S5500BC TPS Functional Architecture 3.10 Keyboard and Mouse Support The server board does not support PS/2 interface keyboards and mice. However, the system BIOS recognizes USB specification-compliant keyboard and mice. 3.11 Wake-up Control The BMC allows events to power-on and
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    Board S5500BC TPS 4. Platform Management The Platform Management subsystem on the Intel® Server Board S5500BC consists of a Baseboard Management Controller (BMC), server management buses, sensors, server management firmware, and system BIOS. The BMC is provided by ServerEngines* Pilot II integrated
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    Intel®Server Board S5500BC TPS Platform Management Revision 1.8 Figure 18. SMBUS Block Diagram Intel order number: E42249-009 45
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    IPMI management of sensors. It polls sensors to monitor and report system health.  IPMI interfaces.  Host interfaces include system management software (SMS) with receive message queue support, and server management mode (SMM).  Terminal mode serial interface.  IPMB interface.  LAN interface
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    controls the system status LED and chassis ID LED. It supports secure lockout of certain front panel functionality and monitors button presses. The chassis ID LED is turned on using a front panel button or a command.  Power state retention.  Power fault analysis.  Intel® Light-Guided Diagnostics
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    IDE (CD-ROM or floppy) or USB devices can be mounted as a remote device to the server.  It is possible to boot all supported priority one operating systems such as Microsoft Windows* and Linux* operating systems from the remotely mounted device and to boot from disk IMAGE (*.IMG) files.  It is
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    which you can change through the embedded web server. Media redirection sessions will persist across system reset but not across an AC power loss. 4.2.5 Web Services for Management (WS-MAN) The BMC firmware supports the Web Services for Management (WS-MAN) specification. 4.2.6 Lightweight Directory
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    Serial Over LAN (SOL) or EMP, see Intel® Server System Integrated Baseboard Management Controller Core External Product Specification. The BIOS does not require that the splash logo be turned off for console redirection to function. The BIOS supports multiple consoles, some of which are in graphics
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    Intel®Server Board S5500BC TPS Platform Management SOL Found Active: The system variables to control those factors. As opposed to component-level power/thermal solutions (such as Demand Based Switching), Node Management functions at the platform level. NM is only available on platforms that support
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    BMC the following information during POST:  Number of supported P-states  Number of supported T-states  Platform Info (data from processor MSR 0CEh)  TDP value per CPU When the BMC detects that POST has completed, the BMC passes on the BIOS-provided system information to the ME. As part of this
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    Intel®Server Board S5500BC TPS Platform Management At system startup, the ME may query the BMC for the Power Management Bus (PMBus) 1.1 Specification. The following sensor types are supported for systems that contain PMBus-compliant power supplies and a PMBus-compliant power distribution board
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    BIOS Setup Utility Intel®Server Board S5500BC TPS system configuration, the summary and diagnostic screen displays. The diagnostic screen displays the following information:  BIOS ID  Platform name  Total memory detected (total size of all installed DDR-3 DIMMs).  Processor information (Intel
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    included in the Unicode standard. The Intel® server board BIOS is only available in or some keys or key sequences or support of pointing devices). 5.3.1.1 Setup Page Layout the Main screen displays. However, serious errors cause the system to display the Error Manager screen instead of the Main
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    BIOS Setup Utility Intel®Server Board S5500BC TPS Key Option Execute Command Exit  Select Item  and the key is pressed, the setup is exited and the BIOS returns to the main System Options Menu screen. The up arrow is used to select the previous value in a pick list, or
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    and boots the system according to the boot order set from the last boot. 5.3.2.1 Main Screen The Main screen is the first screen displayed when the BIOS Setup is entered, unless an error occurred. If an error occurred, the Error Manager screen displays instead. Revision 1.8 Intel order number
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    Utility Intel®Server Board S5500BC TPS  Main Advance d Security Server Management Boot Options Boot Manager   Logged in as  Platform ID   System BIOS  Version SXXXX.86B.xx.yy.zzzz Build Date    Memory
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    Intel®Server Board S5500BC TPS BIOS Setup Utility Setup Item Size Quiet Boot POST Error Pause System Date System memory installed in the system, in MB or GB. The term physical memory indicates the total memory Pause option takes the system to the error manager to review the errors when major errors
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    Setup Utility Intel®Server Board S5500BC TPS Main Advance d Security Server Management Boot Options Boot Manager  ► Processor Configuration ► Memory Configuration ► Mass Storage Controller Configuration ► Serial Port Configuration ► USB Configuration ► PCI Configuration ► System Acoustic and
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    Intel®Server Board S5500BC TPS BIOS Setup Utility Advanced Processor Configuration Processor Socket Processor ID Processor Frequency Microcode Revision L1 Cache RAM L2 Cache RAM L3 Cache RAM Processor 1 Version Processor 2 Version Current Intel® QPI Link Speed Intel® QPI Link Frequency Turbo Mode
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    SpeedStep® Technology allows the system to dynamically adjust processor voltage and core frequency, which can result in decreased average power consumption and decreased average heat production. Contact your OS vendor regarding OS support of this feature. Intel® HT Technology allows multithreaded
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    /Disable Intel® VT-d Coherency support. Enable/Disable Intel® VT-d Address Translation Services (ATS) support. Enable/Disable Intel® VT-d Pass-through DMA support. Hardware Prefetcher is a speculative prefetch unit within the processor(s). Note: Modifying this setting may affect system performance
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    Setup Utility Intel®Server Board S5500BC TPS Advanced Memory Configuration Total Memory Effective Memory Current Configuration Current Memory Speed
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    Intel®Server Board S5500BC TPS Setup Item Current Configuration Options Current Memory Speed Memory RAS and Performance Configuration DIMM_ XY BIOS Setup Utility Help Text Configure memory RAS (Reliability, Availability, and Serviceability) and view current memory performance information and
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    Utility Intel®Server Board S5500BC TPS Advanced Memory RAS and Performance Configuration Capabilities Memory Mirroring Possible Memory Sparing Possible Select Memory RAS , midplane, or backplane of an Intel system. To access this screen from the Main menu, select Advanced > Mass Storage.
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    RAID 0, RAID 1, and RAID 1e, as well as IT (JBOD) mode; Intel® ESRTII - Intel® Embedded Server RAID Technology II, which supports RAID 0, RAID 1, RAID 10 and RAID 5 mode. RAID 5 support requires optional Software RAID 5 Activation Key Onboard Serial ATA (SATA) controller. Comments Unavailable
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    Port 1 SATA Port 2 SATA Port 3 SATA Port 4 SATA Port 5 Intel®Server Board S5500BC TPS Options ENHANCED COMPATIBILIT Y AHCI SW RAID < Not Installed / Native Mode. [AHCI] - Supports all SATA ports using the Advanced Host Controller Interface. [SW RAID] - Supports configuration of SATA ports for RAID
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    Intel®Server Board S5500BC TPS BIOS Setup Utility Advanced Serial Port Configuration Serial A Enable Enabled/Disabled Address IRQ 3F8h / 2F8h / 3E8h / 2E8h options. To access this screen from the Main screen, choose Advanced > USB Configuration. Revision 1.8 Intel order number: E42249-009 69
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    BIOS Setup Utility Intel®Server Board S5500BC TPS Advanced USB Configuration Detected USB Devices USB Controller Legacy USB Support Port 60/64 Emulation Make USB Devices Non-Bootable Enabled / Disabled Enabled / Disabled / Auto Enabled / Disabled Enabled / Disabled
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    Intel®Server Board S5500BC TPS BIOS Setup Utility Setup Item Make USB Devices NonBootable Device Reset timeout One line for each mass storage device in system are enabled to support USB 2.0 mode. Grayed out if the USB Controller is Contact your OS vendor regarding OS support of this disabled.
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    Intel®Server Board S5500BC TPS  Figure 27. Setup Utility - PCI Configuration Screen Display Setup Item Maximize Memory below 4GB Memory Mapped onboard video controller and an add-in video adapter are enabled for system video. The onboard video controller becomes the primary video device. If
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    setting at the highest elevations. Comments Note: The OLTT option is shown only for informational purposes. If the user selects OLTT, the system overrides that selection if it can support CLTT. Note: this item does not appear on some models. Revision 1.8 Intel order number: E42249-009 73
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    BIOS Setup Utility Intel®Server Board S5500BC TPS Setup Item Set Fan Profile Options Performance Acoustics Help Text [Performance] - Fan control provides primary system cooling before attempting to throttle memory. [Acoustic] - The system will favor using throttling of memory over boosting fans
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    Intel®Server Board S5500BC TPS BIOS Setup Utility Setup Item Set Administrator Password Set enabled, locks the power button and reset button on the system's front panel. If [Enabled] is selected, power and reset must be controlled via a system management interface. [No Operation] - No changes to
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    Setup Utility Intel®Server Board S5500BC TPS 5.3.2.4 Server Management Screen The Server Management screen allows the user to configure several server management features. This screen also provides an access point to the screens for configuring console redirection and displaying system information
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    Intel®Server Board S5500BC TPS BIOS Setup Utility Setup Item Clear System Event Log FRB-2 Enable O/S Boot Watchdog Timer O/S Boot Watchdog Timer Policy O/S Boot Watchdog Timer Timeout Plug & Play BMC Detection ACPI 1.0 Support Console Redirection System Information Options Enabled Disabled
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    Console Redirection Flow Control Baud Rate Terminal Type Legacy OS Redirection Intel®Server Board S5500BC TPS Server Management  Disabled / Serial Port A / Serial Port B the legacy OS. 5.3.2.5 Server Management System Information Screen The Server Management System Information screen allows the
  • Intel SC5650BCDP | Technical Product Specification - Page 93
    Intel®Server Board S5500BC TPS BIOS Setup Utility To access this screen from the Main screen, select Server Management > System Information.  Server Management  System Information Board Part Number Board Serial Number System Part Number System Serial Number Chassis Part Number Chassis
  • Intel SC5650BCDP | Technical Product Specification - Page 94
    BIOS Setup Utility Intel®Server Board S5500BC TPS  Main Advance d Security Server Management Boot Options Boot Manager  System Boot Timeout Boot Option #1 Boot Option #2 Boot Option #x Hard Disk Order
  • Intel SC5650BCDP | Technical Product Specification - Page 95
    Intel®Server Board S5500BC TPS BIOS Setup Utility Setup Item Boot Option #x boot option from the boot order. If enabled, the BIOS only loads modules required for booting EFIaware Operating Systems. If enabled, the BIOS will use the legacy video ROM instead of the EFI video ROM. Comments Appears
  • Intel SC5650BCDP | Technical Product Specification - Page 96
    BIOS Setup Utility Intel®Server Board S5500BC TPS 5.3.2.6.1 Add New Boot Option Screen The Utility - Add New Boot Option Fields Setup Item Add boot option label Options Select File system Path for boot option Select one from list provided. Save Help Text Create the label for the new
  • Intel SC5650BCDP | Technical Product Specification - Page 97
    Intel®Server Board S5500BC TPS BIOS Setup Utility Table 32. Setup Utility - Delete Boot . Available Legacy devices for this Device group. Help Text Set system boot order by selecting the boot option for this position. Set system boot order by selecting the boot option for this position. 5.3.2.6.4
  • Intel SC5650BCDP | Technical Product Specification - Page 98
    BIOS Setup Utility Intel®Server Board S5500BC TPS Setup Item CDROM #1 CDROM #2 Table 34. Setup Utility - CDROM Order Fields Options Available Legacy devices for this Device group. Available Legacy devices for this Device group. Help Text Set system boot order by selecting the boot option for
  • Intel SC5650BCDP | Technical Product Specification - Page 99
    Intel®Server Board S5500BC TPS  Network Device #1 Network Device #2 BIOS Setup Utility Boot Options  Help Text Set system boot order by selecting the boot option for this position. Set system boot order by selecting the boot option for this position. Revision 1.8 Intel order number: E42249-
  • Intel SC5650BCDP | Technical Product Specification - Page 100
    BIOS Setup Utility Intel®Server Board S5500BC TPS 5.3.2.7 Boot Manager Screen The Boot Manager screen allows the user to view a list of devices available for booting, and to select a boot device for immediately booting the system. To access this screen from the Main screen, select Boot Manager.
  • Intel SC5650BCDP | Technical Product Specification - Page 101
    restore the server to the factory defaults or to save or restore them to set of user-defined default values. If Load Default Values is selected, the factory default settings (noted in bold in the tables in this chapter) are applied. If Load User Default Values is selected, the system is restored
  • Intel SC5650BCDP | Technical Product Specification - Page 102
    BIOS Setup Utility Intel®Server Board S5500BC TPS Setup Item Save as User Default defaults instead of the BIOS factory defaults. The recommended steps to load the BIOS defaults are: 1. Power down the system (Do not remove AC power). 2. Move the Clear CMOS jumper from pins 1-2 to pins 2-3. 3. Move
  • Intel SC5650BCDP | Technical Product Specification - Page 103
    Intel®Server Board S5500BC TPS Connector / Header Locations and Pin-outs 6. Connector / Header Locations and Pin-outs 6.1 Board Connectors Connector Memory PCI Express* x8 PCI Express* x4 PCI 32/33 SATA SGPIO IPMB HSBP Fans RMM3 Power Supply USB VGA Serial Port GigE Front Panel SATA
  • Intel SC5650BCDP | Technical Product Specification - Page 104
    Connector / Header Locations and Pin-outs Intel®Server Board S5500BC TPS 6.2 Power Connectors The main power supply pin power connector (J7K1) , which provides 12 V power to the CPU Voltage Regulators and Memory.  One SSI-compliant 1x5 pin connector(J9C1), which provides I2C monitors to the power
  • Intel SC5650BCDP | Technical Product Specification - Page 105
    2 SMB_PWR_3V3SB_DAT 3 NC 4 GND 5 3.3V SENSE+ Signal Name White Yellow N/A Black Orange 6.3 Riser Card Slot The Intel® Sever Board S5500BC have one riser card slot (J4B2). The riser card slot supports one low-profile half-length PCI Express* 2.0 x8 add-in card. Table 45. Low-profile PCI Riser
  • Intel SC5650BCDP | Technical Product Specification - Page 106
    GND B45 PETxP7 B46 PETxN7 B47 GND B48 PRSNT2# B49 PE Strap Intel®Server Board S5500BC TPS Slot Name Pin GND A34 PERxP4 A35 PERxN4 A36 GND A48 GND A49 6.4 RMM3 Connector The Intel® Sever Board S5500BC provides a connector (J3C1) to support a RMM3 card. The RMM3 card provides
  • Intel SC5650BCDP | Technical Product Specification - Page 107
    Board S5500BC TPS Connector / Header Locations and Pin-outs 6.5 SSI Front Panel Connector The Intel® Server Board S5500BC provides a 24-pin SSI control panel connector (J9E2) for use with a non-Intel chassis. Several LEDs, such as the power status LED, HDD LED, and LAN status LED, are provided
  • Intel SC5650BCDP | Technical Product Specification - Page 108
    4 RESERVED 5 GND 6 GND 7 GND 8 GND 9 5V 10 GND 11 RESERVED 12 DDCDAT 13 HSYNC 14 VSYNC 15 DDCCLK 6.6.2 SATA II Connectors The Intel® Server Board S5500BC provides six Serial ATA connectors (J1B4, J1B3, J1A2, J1B1, J1B2, and J2B1). Table 49. SATA Connector Pin-out (J1B4, J1B3, J1A2
  • Intel SC5650BCDP | Technical Product Specification - Page 109
    DSR 3 RXD 4 RTS 5 TXD 6 CTS 7 DTR 8 RI 9 GND Serial Port A Header Pin-out 6.6.4 USB and GigE Connector The Intel® ICH10R I/O Controller Hub on the Intel® Server Board S5500BC supports eleven USB ports. Four ports are connected to two USB+RJ-45 NIC stacked connectors on the rear panel
  • Intel SC5650BCDP | Technical Product Specification - Page 110
    18 GND 19 GRN_C 20 GRN_A 21 GRN_C/YEL_A 22 GRN_A/YEL_C Four ports are connected to the two 2x5 headers (J1A3, J2A2) on the Intel® Server Board S5500BC. The following table provides the pin-out information for the header. The two headers are identical. Table 53. Internal USB Header Pin-out
  • Intel SC5650BCDP | Technical Product Specification - Page 111
    S5500BC TPS Connector / Header Locations and Pin-outs 6.7 Fan Headers The Intel® Server Board S5500BC incorporates a system fan circuit that supports five SSI compliant 4-pin fan connectors. The two 4-pin fan connectors are for processor cooling fans: CPU_1 fan (J3K1) and CPU_2 fan (J7K2). The
  • Intel SC5650BCDP | Technical Product Specification - Page 112
    Intel®Server Board S5500BC TPS 6.8 SGPIO Header One 4-Pin SGPIO Connector (J1C1). Table 55. SGPIO connector Pin-out (J1C1) Pin Signal Name 1 SCLK 2 SLOAD 3 SDATAOUT0 4 SDATEOUT1 6.9 Chassis Intrusion Header A 2-pin Chassis intrusion header (J8B3) is provided. This is intended to support
  • Intel SC5650BCDP | Technical Product Specification - Page 113
    Intel®Server Board S5500BC TPS Connector / Header Locations and Pin-outs 6.11 SATA RAID Key Header Table 58. SATA 12 IPMB Header Table 59. IPMB Connector Pin-out (J8B1) Pin Signal Name 1 SMB_IPMB_5VSB_DAT 2 GND 3 SMB_IPMB_5VSB_CLK 4 P5V_STBY Revision 1.8 Intel order number: E42249-009 99
  • Intel SC5650BCDP | Technical Product Specification - Page 114
    Jumper Block Settings Intel®Server Board S5500BC TPS 7. Jumper Block Settings The Intel® Server Board S5500BC has several jumper blocks that you can use to configure, recover, or enable /disable specific features of the server board. Pin 1 on each jumper block is denoted by ―▼‖. Figure 44. Jumper
  • Intel SC5650BCDP | Technical Product Specification - Page 115
    Intel®Server Board S5500BC TPS Jumper Block Settings Jumper Name J8C1: BMC Force Update J2D1: Password Clear Pins 1-2 2-3 1-2 2-3 J2D2: CMOS Clear Jumper Name J1A1: BIOS Recovery 1-2 2-3 Pins 1-2 2-3 J8B5: ME Force Update 1-2 2-3 Table 60. Jumper Block Matrix What happens at system reset...
  • Intel SC5650BCDP | Technical Product Specification - Page 116
    Intel®Light-Guided Diagnostics Intel®Server Board S5500BC TPS 8. Intel®Light-Guided Diagnostics The Intel® Server Board S5500BC has several onboard diagnostic LEDs to assist in troubleshooting board-level issues. Functionality of the onboard LEDs is owned by the BMC and system BIOS. This section
  • Intel SC5650BCDP | Technical Product Specification - Page 117
    critical, or non-recoverable conditions exist. 8.3 DIMM Fault LEDs The Intel® Server Board S5500BC provides a memory fault LED for each DIMM slot. Refer to Figure 10 for the LEDs' location. The DIMM fault LED is illuminated when the system BIOS disables a DIMM when it reaches a specified number of
  • Intel SC5650BCDP | Technical Product Specification - Page 118
    BIOS displays the POST code on the POST code diagnostic LEDs on the back edge of the Intel® Server Board S5500BC. The diagnostic LEDs can identify the last POST process executed to help troubleshoot a system hang during POST. Refer to Appendix D for a complete overview of how the LEDs are read and
  • Intel SC5650BCDP | Technical Product Specification - Page 119
    . Intel Corporation cannot be held responsible if components fail or the server board does not operate correctly when used outside of the published operating parameters. 9.2 Baseboard Power Requirements This section reviews the power supply design guidelines for a system with an Intel® Server Board
  • Intel SC5650BCDP | Technical Product Specification - Page 120
    Power and Environmental Specifications Intel®Server Board S5500BC TPS Figure 45. Power Distribution Block Diagram 106 Intel order number: E42249-009 Revision 1.8
  • Intel SC5650BCDP | Technical Product Specification - Page 121
    Intel®Server power should not exceed 450W. 3. Peak power and current loading shall be supported for a minimum of 12 seconds. 4. Combined 3.3V and 5V power shall power supply shall operate at lighter load conditions when the system first powers on. Under these conditions the voltage regulation limits
  • Intel SC5650BCDP | Technical Product Specification - Page 122
    Power and Environmental Specifications Intel®Server Board S5500BC TPS Note: The grounding should be +12V2, -12V, and 5VSB. The power supply uses remote sense (3.3VS) to regulate out drops in the system for the +3.3V output. The +5V, +12V1, +12V2, -12V and 5VSB outputs only use remote sense
  • Intel SC5650BCDP | Technical Product Specification - Page 123
    Intel®Server Board S5500BC TPS Power and Environmental Specifications Table 67. Voltage Regulation Limits Parameter + 3.3V + 5V + 12V1,2 - 12V + 5VSB Tolerance - 5% / +5% - 5% / +5% - 5% / should provide proof of the unit's closed-loop stability Revision 1.8 Intel order number: E42249-009 109
  • Intel SC5650BCDP | Technical Product Specification - Page 124
    Power and Environmental Specifications Intel®Server Board S5500BC TPS with local sensing through the submission of bode plots. Closed-loop stability must be the AC input, with PSON held low and the PSON signal, with the AC input applied. 110 Intel order number: E42249-009 Revision 1.8
  • Intel SC5650BCDP | Technical Product Specification - Page 125
    Intel®Server Board S5500BC TPS Power and Environmental Specifications Table 71. Output Voltage Timing Item Tvout_rise Tvout_on Description Output voltage rise being de-asserted. Minimum 21 20 5 Maximum 1500 2500 400 50 Units ms ms ms ms ms ms Revision 1.8 Intel order number: E42249-009 111
  • Intel SC5650BCDP | Technical Product Specification - Page 126
    Power and Environmental Specifications Intel®Server Board S5500BC TPS Item Tpwok_on T pwok_off Tpwok_low Tsb_vout be immune to any residual voltage placed on the outputs (typically a leakage voltage through the system from standby output) up to 500 mV. There should be no additional heat generated,
  • Intel SC5650BCDP | Technical Product Specification - Page 127
    Intel®Server Board S5500BC TPS Power and Environmental Specifications 9.2.16 Protection Circuits Protection circuits inside the ) Limits Output Voltage +3.3V +5V +12V1,2 -12V +5VSB MIN (V) 3.9 5.7 13.3 -13.3 5.7 MAX (V) 4.5 6.2 14.5 -14.5 6.5 Revision 1.8 Intel order number: E42249-009 113
  • Intel SC5650BCDP | Technical Product Specification - Page 128
    Power and Environmental Specifications Intel®Server Board S5500BC TPS 9.2.19 Over Temperature Protection (OTP) The power supply will be protected against condition. The OTP trip level shall have a minimum of 4C of ambient temperature hysteresis. 114 Intel order number: E42249-009 Revision 1.8
  • Intel SC5650BCDP | Technical Product Specification - Page 129
    Intel®Server Board S5500BC TPS Regulatory and Certification Information 10. Regulatory and Certification Information WARNING To ensure regulatory compliance, you must adhere to the assembly instructions in this guide not been planned for with respect to these systems. If there is any change of plan
  • Intel SC5650BCDP | Technical Product Specification - Page 130
    Intel®Server Board S5500BC TPS 10.1.2 Product EMC Compliance - Class A Compliance Note: This product requires complying with Class A EMC requirements. However, Intel targets a 10 db margin to support (Korea) IMPORTANT NOTE: The host system with the Server Board S5500BC requires the use of shielded
  • Intel SC5650BCDP | Technical Product Specification - Page 131
    S5500BC TPS Regulatory and Certification Information The server board complies with the following ecology regulatory requirements:  All materials, parts, and subassemblies must not contain restricted materials as defined in Intel's Environmental Product Content Specification of Suppliers and
  • Intel SC5650BCDP | Technical Product Specification - Page 132
    Regulatory and Certification Information Intel®Server Board S5500BC TPS 10.2 Product Regulatory Compliance Markings The server board is provided with (A) MADE IN xxxxx (Provided by label, not silk screen) Examples (Intel® Server Board S5500BC) for boxed type boards; or Board PB number for nonboxed
  • Intel SC5650BCDP | Technical Product Specification - Page 133
    Intel®Server Board S5500BC TPS Regulatory Compliance China RoHS Marking Region China Regulatory and Certification Management Practices for Perchlorate Materials. This product / part includes a battery which contains Perchlorate material. Revision 1.8 Intel order number: E42249-009 119
  • Intel SC5650BCDP | Technical Product Specification - Page 134
    Information Intel®Server Board S5500BC received, including interference that may cause undesired operation. Intel Corporation 5200 N.E. Elam Young Parkway Hillsboro, OR 97124-6497 not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
  • Intel SC5650BCDP | Technical Product Specification - Page 135
    Intel®Server Board S5500BC TPS Regulatory and Certification Information 10.3.2 ICES-003 (Canada) Cet appareil numérique in a domestic environment, it may cause radio interference. Install and use the equipment according to the instruction manual. Revision 1.8 Intel order number: E42249-009 121
  • Intel SC5650BCDP | Technical Product Specification - Page 136
    Regulatory and Certification Information Intel®Server Board S5500BC TPS 10.3.5 BSMI (Taiwan) The BSMI from local Intel representative 3. Name of Certification Recipient: Intel Corporation 4. Date of Manufacturer: Refer to date code on product 5. Manufacturer/Nation: Intel Corporation/Refer
  • Intel SC5650BCDP | Technical Product Specification - Page 137
    with 95 W and less Thermal Design Power (TDP) are supported on this server board. Previous generation Intel® Xeon® processors are not supported. Intel® Xeon® processor 5500 series with TDP higher than 95 W are not supported.  You must install processors in order. CPU 1 is located near the edge of
  • Intel SC5650BCDP | Technical Product Specification - Page 138
    Appendix B: Sensor Tables Intel®Server Board S5500BC TPS Appendix B: Sensor Tables This appendix lists the sensor identification numbers and information regarding the sensor type, name, supported thresholds, assertion and de-assertion information, and a brief description of the sensor purpose. See
  • Intel SC5650BCDP | Technical Product Specification - Page 139
    Intel®Server Board S5500BC . You can rearm the sensors can be done manually or automatically. This column indicates the type supported by the sensor. The following abbreviations are used in when the main (system) power is off, but AC power is present. Revision 1.8 Intel order number: E42249-009 125
  • Intel SC5650BCDP | Technical Product Specification - Page 140
    Appendix B: Sensor Tables Intel®Server Board S5500BC TPS Table 76. Integrated BMC Core Sensors Full Sensor . Transition from insufficient state. 05 - Nonredundant: insufficient resources Contrib. To System Status OK Fatal OK Degraded Degraded Degraded Degraded Fatal Assert / Deassert Readabl
  • Intel SC5650BCDP | Technical Product Specification - Page 141
    Intel®Server Board S5500BC TPS Appendix B: Sensor Tables Full Sensor Name (Sensor name in SDR) IPMI Watchdog (IPMI Watchdog) Physical Security (Physical Scrty) FP Interrupt (FP NMI Diag Int) SMI Timeout (SMI Timeout) System Event Log (System Event Log) Sensor # Platform Sensor Type Event /
  • Intel SC5650BCDP | Technical Product Specification - Page 142
    Sensor Tables Intel®Server Board S5500BC TPS Full Sensor Name (Sensor name in SDR) Sensor # Platform Sensor Type Event / Applicability Reading Type Event Offset Triggers System Event (System Event) System Event Sensor Specific 04 - PEF action 08h All 12h 6Fh Contrib. To System Status
  • Intel SC5650BCDP | Technical Product Specification - Page 143
    Intel®Server Board Margin (IOH Therm Margin) Processor 1 Memory Thermal Margin (Mem P1 Thrm Mrgn) Processor 2 Memory Thermal Margin (Mem P2 nc] [u,l] [c,nc] [u] [c,nc] [u] [c,nc] [u] [c,nc] [l] [c,nc] Contrib. To System Status nc = Degraded c = Non-fatal nc = Degraded c = Non-fatal nc = Degraded
  • Intel SC5650BCDP | Technical Product Specification - Page 144
    Appendix B: Sensor Tables Intel®Server Board S5500BC TPS Full Sensor Name (Sensor name in SDR) Sensor # Platform Sensor Type Event / Applicability Reading Type Event Offset Triggers Contrib. To System Status Assert / Deassert Readabl e Value / Offsets Event Data Rearm Standby Fan
  • Intel SC5650BCDP | Technical Product Specification - Page 145
    Intel®Server Board S5500BC TPS Appendix B: Sensor Tables Full Sensor Name (Sensor name in SDR) Sensor # Platform Sensor Type Event / Applicability Reading Type Event Offset Triggers Contrib. To System Status 06 - NonRedundant: degraded from fully redundant. 07 - Redundant degraded from non-
  • Intel SC5650BCDP | Technical Product Specification - Page 146
    Appendix B: Sensor Tables Intel®Server Board S5500BC TPS Full Sensor Name (Sensor name in SDR) Sensor # Platform Applicability Power Chassisspecific All Dual processor only All Dual processor only Sensor Type Event / Reading Type Event Offset Triggers Contrib. To System Status Other Units
  • Intel SC5650BCDP | Technical Product Specification - Page 147
    Intel®Server Board S5500BC TPS Appendix B: Sensor Tables Full Sensor Name (Sensor name in SDR) Processor 1 Thermal Control % (P1 Therm Ctrl %) Processor 2 Thermal Control % (P2 Therm Ctrl %) Processor 1 VRD Temp (P1 VRD Hot) Processor 2 VRD Temp (P2 VRD Hot) Catastrophic Error (CATERR) CPU Missing
  • Intel SC5650BCDP | Technical Product Specification - Page 148
    Appendix C: POST Error Messages and Handling Intel®Server Board S5500BC TPS Appendix C: POST Error Messages that can be sent on the progress port. The progress codes may be reported by the system BIOS or option ROMs. The Response section in the following table is divided into three types:
  • Intel SC5650BCDP | Technical Product Specification - Page 149
    Intel®Server Processor 0x stepping mismatch. Processor 0x family mismatch detected. Processor 0x Intel(R) QPI speed mismatch. Processor 0x model mismatch. Processor 0x speeds mismatched. Processor 0x family is not supported. Processor record empty System event log full Memory component could
  • Intel SC5650BCDP | Technical Product Specification - Page 150
    Appendix C: POST Error Messages and Handling Intel®Server Board S5500BC TPS Error Code 8529 852A 852B 8540 8541 8542 ECC error encountered. Chipset Reclaim of non critical variables complete. Unspecified processor component has encountered a non specific error. Keyboard component was not detected
  • Intel SC5650BCDP | Technical Product Specification - Page 151
    Intel®Server supported. ATA/ATPI ATA SMART is disabled. PCI Express component encountered a PERR error. PCI Express component encountered a SERR error. PCI Express IBIST error. DXE boot services driver Not enough memory POST error beep codes. Prior to system Video initialization, the BIOS uses these
  • Intel SC5650BCDP | Technical Product Specification - Page 152
    Appendix C: POST Error Messages and Handling Intel®Server Board S5500BC TPS Table 79. POST Error Beep Codes Beeps 3 Error Message Memory error POST Progress Code Multiple Description System halted because a fatal error related to the memory was detected. The following Beep Codes are from the
  • Intel SC5650BCDP | Technical Product Specification - Page 153
    Intel®Server Board S5500BC TPS Appendix D: POST Code Diagnostic LED Decoder Appendix D: POST Code Diagnostic LED Decoder The BIOS executes platform configuration processes during the system boot. Each process is assigned a specific hex POST code number. As each configuration routine is started,
  • Intel SC5650BCDP | Technical Product Specification - Page 154
    LED Decoder Intel®Server Board S5500BC TPS Memory Test Phase 0xBAh O X O O O X O X Memory Map Creation Phase 0xBBh O X O O O X O O RAS Initialization Phase 0xBCh O X O O O O X X MRC Complete Host Processor 0x04h X X X O X O X X Early processor initialization (flat32.asm) where system
  • Intel SC5650BCDP | Technical Product Specification - Page 155
    Intel®Server Board S5500BC TPS Appendix D: POST Code Diagnostic LED Decoder Diagnostic LED Decoder O = keyboard Detecting the presence of the keyboard Enabling the keyboard Clearing keyboard input buffer Instructing keyboard controller to run Self Test(PS/2 only) Resetting the mouse Detecting the
  • Intel SC5650BCDP | Technical Product Specification - Page 156
    Intel®Server memory found, configured, and installed correctly O O O X X X O O Reserved for Initializaiton module use (PEIM) Driver X X X Entering Sleep state O Exiting Sleep state X Operating system has requested EFI to close boot services (ExitBootServices ( ) Has been called) 0xF9h O O O
  • Intel SC5650BCDP | Technical Product Specification - Page 157
    support the Intel® Server Board S5500BC. The server board and the system have features designed to support the highdensity server market. For more information, refer to the Intel® Server System SR1630BC Technical Product Specification (TPS). A Rack handles (two) B Processor air duct C System memory
  • Intel SC5650BCDP | Technical Product Specification - Page 158
    System SC5650BCDP The Intel® Entry Server Chassis SC5650 is a 5.2U pedestal chassis designed to support the Intel® Server Boards S5500BC. The Intel® Entry Server Chassis SC5650 addresses the value server market with two power factor correction (PFC) power supply unit (PSU) configurations:  SC5650DP
  • Intel SC5650BCDP | Technical Product Specification - Page 159
    Processor Advanced Programmable Interrupt Control Application Specific Integrated Circuit Advanced Server Management Interface Basic Input/Output System memory, which normally resides on the server board. Direct Platform Control Electrically Erasable Programmable Read-Only Memory Bus Intel®
  • Intel SC5650BCDP | Technical Product Specification - Page 160
    , Serviceability, Usability, and Manageability Reduced Instruction Set Computing Read Only Memory Real-Time Clock (Component of ICH peripheral chip on the server board) Sensor Data Record Single Edge Connector Cartridge Serial Electrically Erasable Programmable Read-Only Memory System Event
  • Intel SC5650BCDP | Technical Product Specification - Page 161
    Intel®Server Board S5500BC TPS Term SNMP TBD TIM UART UDP UHCI UTC VID VRD Word ZIF Simple Network Management Interface Coordinated Universal Time Voltage Identification Voltage Regulator Down 16-bit quantity Zero Insertion Force Glossary Revision 1.8 Intel order number: E42249-009 147
  • Intel SC5650BCDP | Technical Product Specification - Page 162
    for Directed I/O Architecture Specification  Intel® I/O Controller Hub 9 (ICH9) Family Datasheet  Intel® I/O Controller Hub 10 (ICH10) Family EDS Specification Update  Intel® Server Chassis SC5650 Technical Product Specification  Intel® Server System SR1630BC Technical Product Specification 148
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Intel®
Server Board S5500BC
Technical Product Specification
Intel order number: E42249-009
Revision 1.8
June 2011
Enterprise Platforms and Services Division
Marketing