ASRock AD425PV3 User Manual - Page 28

DRAM tWR, DRAM tWTR, DRAM tRRD, DRAM tRTP, DRAM Rcomp Control, DRAM Rcomp G0, DRAM Rcomp G2, DRAM

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DRAM tWR This controls the number of DRAM clocks for TWR. Min: 3. Max: 15. The default value is [Auto]. DRAM tWTR This controls the number of DRAM clocks for TWTR. Min: 2. Max: 15. The default value is [Auto]. DRAM tRRD This controls the number of DRAM clocks for TRRD. Min: 2. Max: 15. The default value is [Auto]. DRAM tRTP This controls the number of DRAM clocks for TRTP. Min: 2. Max: 13. The default value is [Auto]. DRAM Rcomp Control BIOS SETUP UTILITY OC Tweaker DRAM Rcomp Info : 55-66-66-66-55-55 DRAM Rcomp G0 [Auto] DRAM Rcomp G2 [Auto] DRAM Rcomp G3 [Auto] DRAM Rcomp G4 [Auto] DRAM Rcomp G5 [Auto] DRAM Rcomp G6 [Auto] DRAM Rcomp G0 Control. +F1 F9 F10 ESC Select Screen Select Item Change Option General Help Load Defaults Save and Exit Exit v02.54 (C) Copyright 1985-2003, American Megatrends, Inc. DRAM Rcomp G0 This controls DRAM Rcomp G0. The default value is [Auto]. DRAM Rcomp G2 This controls DRAM Rcomp G2. The default value is [Auto]. DRAM Rcomp G3 This controls DRAM Rcomp G3. The default value is [Auto]. DRAM Rcomp G4 This controls DRAM Rcomp G4. The default value is [Auto]. DRAM Rcomp G5 This controls DRAM Rcomp G5. The default value is [Auto]. DRAM Rcomp G6 This controls DRAM Rcomp G6. The default value is [Auto]. 28

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BIOS SETUP UTILITY
Select Screen
Select Item
+-
Change Option
F1
General Help
F9
Load Defaults
F10
Save and Exit
ESC
Exit
v02.54 (C) Copyright 1985-2003, American Megatrends, Inc.
OC Tweaker
Select Screen
Select Item
+-
Change Option
F1
General Help
F9
Load Defaults
F10
Save and Exit
ESC
Exit
DRAM Rcomp G0
[Auto]
DRAM Rcomp G2
DRAM Rcomp G3
DRAM Rcomp G4
DRAM Rcomp G5
DRAM Rcomp G6
[Auto]
[Auto]
[Auto]
[Auto]
[Auto]
DRAM Rcomp G0 Control.
DRAM Rcomp Info : 55-66-66-66-55-55
DRAM tWR
This controls the number of DRAM clocks for TWR. Min: 3. Max: 15. The
default value is [Auto].
DRAM tWTR
This controls the number of DRAM clocks for TWTR. Min: 2. Max: 15. The
default value is [Auto].
DRAM tRRD
This controls the number of DRAM clocks for TRRD. Min: 2. Max: 15. The
default value is [Auto].
DRAM tRTP
This controls the number of DRAM clocks for TRTP. Min: 2. Max: 13. The
default value is [Auto].
DRAM Rcomp Control
DRAM Rcomp G0
This controls DRAM Rcomp G0. The default value is [Auto].
DRAM Rcomp G2
This controls DRAM Rcomp G2. The default value is [Auto].
DRAM Rcomp G3
This controls DRAM Rcomp G3. The default value is [Auto].
DRAM Rcomp G4
This controls DRAM Rcomp G4. The default value is [Auto].
DRAM Rcomp G5
This controls DRAM Rcomp G5. The default value is [Auto].
DRAM Rcomp G6
This controls DRAM Rcomp G6. The default value is [Auto].