ASRock H81TM-ITX User Manual - Page 60

CPU Integrated VR Efficiency Mode, CPU Digital IO Voltage Offset

Page 60 highlights

CPU Analog IO Voltage Offset CPU I/O Analog Voltage. CPU Digital IO Voltage Offset CPU I/O Digital Voltage. CPU Integrated VR Faults Disable FIVR Faults to raise the threshold to trigger CPU over current protection and over voltage protection for better overclocking capabilities. CPU Integrated VR Efficiency Mode Enable FIVR Efficiency Management for power saving. Disable for better performance and overclocking capabilities. Voltage Configuration Power Saving Mode Enable Power Saving Mode to reduce power consumption. DRAM Voltage Use this to configure DRAM Voltage. The default value is [Auto]. 56 English

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56
English
CPU Analog IO Voltage Offset
CPU I/O Analog Voltage.
CPU Digital IO Voltage Offset
CPU I/O Digital Voltage.
CPU Integrated VR Faults
Disable FIVR Faults to raise the threshold to trigger CPU over current protection
and over voltage protection for better overclocking capabilities.
CPU Integrated VR Efficiency Mode
Enable FIVR Efficiency Management for power saving. Disable for better performance and
overclocking capabilities.
Voltage Configuration
Power Saving Mode
Enable Power Saving Mode to reduce power consumption.
DRAM Voltage
Use this to configure DRAM Voltage. °e default value is [Auto].