ASRock Z87E-ITX User Manual - Page 72
FIVR Switch Frequency Offset
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Z87E-ITX IO-L (CHA) Configure IO latency for channel A. IO-L (CHB) Configure IO latency for channel B. ODT WR (CHA) Configure the memory on die termination resistors' WR for channel A. ODT WR (CHB) Configure the memory on die termination resistors' WR for channel B. ODT NOM (CHA) Use this to change ODT (CHA) Auto/Manual settings. The default is [Auto]. ODT NOM (CHB) Use this to change ODT (CHB) Auto/Manual settings. The default is [Auto]. Command Tri State Enable for DRAM power saving. MRC Fast Boot Enable Memory Fast Boot to skip DRAM memory training for booting faster. FIVR Configuration FIVR Switch Frequency Signature Select whether to boost or lower the FIVR Switch Frequency. FIVR Switch Frequency Offset Configure the percentage of frequency boost or deduction. CPU Voltage Mode Auto: For optimized settings. Adaptive: Add voltage to the CPU when the system is under heavy load. Override: The voltage is fixed. 67 English