Acer Ferrari 5000 Ferrari 5000 Service Guide - Page 48

Hardware Specification and Configuration Processor Item Type Feature On-die second (L2) cache Specification AMD TurionTM 64 X2 dual-core TL-50/TL-52/TL-56/TL-60 processor • AMD64 technology features uncompromising 64-bit and 32-bit performance • Vastly expands memory address ability with 40-bit physical addresses, 48-bit virtual addresses • Doubles the number of internal registers with eight additional (16 total) 64-bit integer registers and eight additional (16 total)128-bit SSE/SSE2/SSE3 registers • One 16-bit link supporting up to 1600MHz • Up to 6.4GB/s peak HyperTransportTM I/O bandwidth • Supports industry-standard widely-available PC2-3200 (DDR2-400), PC24200 (DDR3-533), PC2-4300 (DDR2-533), and PC-5300 (DDR2-667) unbuffered SODIMMs • Up to 10.7GB/s memory bandwidth • Dual channel, 128-bit interface • TL-52/TL-56/TL-60: 512KB • TL-50: 256MB System Main Chipset Item Core logic System clock BIOS ROM VGA KBC PCMCIA & IEEE 1394 & Memory card reader Super I/O IR Audio Codec & Amplifier LAN Specification ATi RX485 + ATi SB460 ICS ICS951462 SST 39VF080 ATi M56P VGA controller with VRAM 256MB NSPC97551 TI7412 NSPC87383 Vishay TFU6102F Realtek ALC883D Azalia Codec and Amplifier Maxim MAX9710 Broadcom 5788MG North Bridge Item Chipset Package Feature Specification ATi RX485 Micro-FCBGA 465-pin • Processor host bus support • Integrated SDRAM controller up to 4GB (2 SODIMMs support) • Integrated SDRAM clock buffer, 2 SODIMMs support • External Graphics interface for PCI Express Architecture support Chapter 1 39