Acer R310-U-P3200 User Guide - Page 32

BIOS POST Checkpoint Codes

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22 3 Getting Started BIOS POST Checkpoint Codes The POST code checkpoints are references and instructions used during the BIOS pre-boot process. The following table describes the checkpoints and associated beep codes, if any, that may occur during the POST portion of the BIOS. Checkpoint Code Beep Code Description 01h One short beep before boot 02h Verify Real Mode. If the CPU is in protected mode, turn on A20 and pulse the reset line, forcing a shutdown 0. NOTE: Hook routine should not alter DX, which holds the powerup CPUID. 03h Disabel Non-Maskable Interrupts (NMI). 04h Get CPU type from CPU registers and other methods. Save CPU type in NVRAM. NOTE: Hook routine should not alter DX, which holds the powerup CPUID. 06h Initialize system hardware. Reset the DMA controllers, disable video, clear any pending interrupts from the real-time clock and setup port B register. 07h Disable system ROM shadow and start to execute ROMEXEC code from the flash part. This task is pulled into the build only when the ROMEXEC relocation is installed. 08h Initialize chipset registers to the Initial POST Values.

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3 Getting Started
22
BIOS POST Checkpoint Codes
The POST code checkpoints are references and instructions used
during the BIOS pre-boot process. The following table describes
the checkpoints and associated beep codes, if any, that may
occur during the POST portion of the BIOS
.
Checkpoint
Code
Beep Code
Description
01h
One short
beep before
boot
02h
Verify Real Mode. If the CPU is in protected
mode, turn on A20 and pulse the reset line,
forcing a shutdown 0.
NOTE: Hook routine should not alter DX,
which holds the powerup CPUID.
03h
Disabel Non-Maskable Interrupts (NMI).
04h
Get CPU type from CPU registers and other
methods.
Save CPU type in NVRAM.
NOTE: Hook routine should not alter DX,
which holds the powerup CPUID.
06h
Initialize system hardware. Reset the DMA
controllers, disable video, clear any pending
interrupts from the real-time clock and
setup port B register.
07h
Disable system ROM shadow and start to
execute ROMEXEC code from the flash part.
This task is pulled into the build only when
the ROMEXEC relocation is installed.
08h
Initialize chipset registers to the Initial POST
Values.