Acer Veriton 2800 Veriton 2800 Service Guide - Page 33

Advanced Chipset Features Phoenix - AwardBIOS CMOS Setup Utility Advanced Chipset Features DRAM Timing Selectable x CAS Latency Time By SPD Auto Help Item x DRAM RAS# to CAS# Delay Auto Menu Level X x DRAM RAS# Precharge Auto x Precharge delay (tRAS) Auto SLP_S4# Assertion Width 4 to 5 Sec. ** VGA Setting ** XOn-chip Video Memory Size PEG/Onchip VGA Control DVMT Mode [Press Enter] [Auto] [DVMT] KLIJ :Move Enter: Select +/-/ :Value ESC:Exit F1:General Help F6:Load Optimized Defaults F7:Load Fail-Safe Defaults Parameter Description Options CAS Latency TIme When synchronous DRAM is installed, the number of clock 5,4,3,6,Auto cycles of CAS latency depends on the DRAM timing. DRAM RAS# to CAS# Delay This field lets you insert a timing delay between the CAS and RAS strobe signals, used when DRAM is written to, read from, or refreshed, Fast gives faster performance; and Slow gives more stable performance. This field applies only when synchronous DRAM is installed in the system. 2,3,4,5,6,Auto DRAM RAS# Precharge TIme If an insufficient number of cycles is allowed for the RAS to accumulate its charge before DRAM refresh, the refresh may be incomplete and the DRAM may fail to retain data. Fast fives faster performance; and Slow gives more stable performance.This field applies only when synchronous DRAM is installed in the syste. 2,3,4,5,6,Auto Precharge Delay This option is used to set up the timing delay between the 4,5,6,7,8,9,10,11, SDRAM active to precharge. 12,Auto On Chip Memory Size Select the on chip memory size for VGA drive use. PEG/Onchip VGA Control This option is used to control the VGA Onchip VGA PEG Port Auto DVMT Mode This option is used to select the video mode. Fixed,DVMT,Both 26 Chapter 2