Asus M2N-LR User Manual - Page 73

Memory Configuration

Page 73 highlights

Memory Controller Memory Controller Memory Configuration ECC Configuration Power Down Control Alternate VID [Auto] [0.850 V] Memory CLK :667 MHz CAS Latency(TCL) :5.0 RAS/CAS Delay(Trcd) :5 CLK Min Active RAS(Tras) :15 CLK Row Precharge Time(Trp) :5 CLK RAS/RAS Delay(Trrd) :3 CLK Row Cycle (Trc) :21 CLK Asynchronous Latency :6 ns Memory Configuration The memory configuration menu allows you to change the memory settings. Memory Configuration Memclock Mode MCT Timing Mode Bank Interleaving Enable Clock to All DIMMS DQS Signal Training Control MemClk Tristate C3/ATLVID CS Sparing Enable Memory Hole Remapping [Auto] [Auto] [Auto] [Disabled] [Enabled] [Disabled] [Disabled] [Enabled] Memclock Mode [Auto] Sets the memory clock mode. Configuration options: [Auto] [Limit] [Manual] Select the DRAM Frequency program method. If Auto, the DRAM speed will be based on SPDs. If Limit, the DRAM speed will not exceed the specific value. If Manual, the DRAM will be programmed regardless. Select Screen Select Item +- Change Option F1 General Help F10 Save and Exit ESC Exit The following item appears when the Memclock Mode is set to Limit or Manual. Memclock Value [200 MHz] Sets the memory clock mode limit. Configuration options: [400 MHz] [533 MHz] [ 667 MHz] [ 800 MHz] MCT Timing Mode [Auto] Sets the MCT Timing Mode. Configuration options: [Auto] [Manual] Bank Interleaving [Auto] Allows you to enable the bank memory interleaving. Configuration options: [Disabled] [Auto] Enable Clock to All DIMMs [Disabled] Configuration options: [Disabled] [Enabled] 4-20 Chapter 4: BIOS setup

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³-20
Chapter ³: BIOS setup
Memory Controller
Memory Controller
Memory Configuration
ECC Configuration
Power Down Control
[Auto]
Alternate VID
[0.850 V]
Memory CLK
:667 MHz
CAS Latency(TCL)
:5.0
RAS/CAS Delay(Trcd)
:5 CLK
Min Active RAS(Tras)
:15 CLK
Row Precharge Time(Trp) :5 CLK
RAS/RAS Delay(Trrd)
:3 CLK
Row Cycle (Trc)
:21 CLK
Asynchronous Latency
:6 ns
Memory Configuration
The memory configuration menu allows you to change the memory settings.
Memory Configuration
Memclock Mode
[Auto]
MCT Timing Mode
[Auto]
Bank Interleaving
[Auto]
Enable Clock to All DIMMS
[Disabled]
DQS Signal Training Control
[Enabled]
MemClk Tristate C3/ATLVID
[Disabled]
CS Sparing Enable
[Disabled]
Memory Hole Remapping
[Enabled]
Select the DRAM
Frequency program
method. If Auto,
the DRAM speed will
be based on SPDs.
If Limit, the DRAM
speed will not exceed
the specific value.
If Manual, the DRAM
will be programmed
regardless.
Memclock Value [200 MHz]
Sets the memory clock mode limit.
Configuration options: [400 MHz] [533 MHz] [ 667 MHz] [ 800 MHz]
MCT Timing Mode [Auto]
Sets the MCT Timing Mode. Configuration options: [Auto] [Manual]
Bank Interleaving [Auto]
Allows you to enable the bank memory interleaving.
Configuration options: [Disabled] [Auto]
Enable Clock to All DIMMs [Disabled]
Configuration options: [Disabled] [Enabled]
Memclock Mode [Auto]
Sets the memory clock mode.
Configuration options: [Auto] [Limit] [Manual]
The following item appears when the Memclock Mode is set to Limit or Manual.