Asus RS704DA-E6 PS4 User Guide - Page 94
Hyper Transport Configuration
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PCIE Slot 1 Core Setting Powerdown Unused lanes [Enabled] Configuration options: [Disabled] [Enabled] Turn Off PLL During L1/L23 [Enable] Configuration options: [Disabled] [Enabled] TX Drive Strength [Auto] Configuration options: [Auto] [26mA] [20mA] [22mA] [24mA] TXCLK Clock Gating in L1 [Enabled] Configuration options: [Disabled] [Enabled] LCLK Clock Gating in L1 [Enabled] Configuration options: [Disabled] [Enabled] SB Core Setting TX Drive Strength [Auto] Configuration options: [Auto] [26mA] [20mA] [22mA] [24mA] TXCLK Clock Gating in L1 [Enable] Configuration options: [Disabled] [Enabled] LCLK Clock Gating in L1 [Enable] Configuration options: [Disabled] [Enabled] Hyper Transport Configuration HT Extended Address [Disabled] Configuration options: [Auto] [Disabled] [Enable] HT3 Link Power State [Auto] Configuration options: [Auto] [LS0] [LS1] [LS2] [LS3] UnitID Clumping [Auto] Configuration options: [Auto] [Disabled] [UnitID 2/3] [UnitID B/C] [UnitID 2/3&B/C] HT Link Tristate [Auto] Configuration options: [Auto] [Disabled] [CAD/CTL] [CAD/CTL/CLK] NB Deempasies Level [Disabled] Configuration options: [Disabled] [-0.4dB] [-1.32dB] [-2.08dB] [-3.1dB] [-4.22dB] [-5.50dB] [-7.05dB] IOMMU [Disabled] Configuration options: [Disabled] [Enabled] 5-22 Chapter 5: BIOS setup