Biostar 945GC-M7TE Bios Setup - Page 15

945GC-M7 TE DRAM RAS# Precharge If an insufficient number of cycles is allowed for RAS to accumulate its charge before DRAM refresh, the refresh may be incomplete, and the DRAM may fail to retain data. Fast gives faster performance; and Slow gives more stable performance. This field applies only when synchronous DRAM is installed in the system. The Choices: 4 (default), 2, 3, 5, 6, Auto. Precharge Delay (tRAS) This item controls the number of DRAM clocks to activate the precharge delay. The Choices: 11 (default), 4/5/6/7/8/9/10/12/13/14/15, Auto. System Memory Frequency This item allows you to select the Memory Frequency. The Choices: Auto (default), 400MHz, 533MHz, and 667MHz. VGA Setting PEG/Onchip VGA Control This item allows you to enabled or disabled PEG/On-chip VGA controller. The Choices: Auto (default), Onchip VGA, PEG Port. PEG Force X1 This item allows you to enabled or disabled the PEG Force X1 The Choices: Disabled (default), Enabled. SLP S4# Assertion Width This item sets the minimum assertion width of the SLP-S4# signal to guarantee the DRAM has been safely power-cycled. The Choices: 4 to 5 Sec. (default), 3 to 4 Sec., 2 to 3 Sec., 1 to 2 Sec. System BIOS Cacheable Selecting Enabled allows you caching of the system BIOS ROM at F0000h~FFFFFh, resulting a better system performance. However, if any program writes to this memory area, a system error may result. The Choices: Enabled (default), Disabled. Video BIOS Cacheable Select Enabled allows caching of the video BIOS, resulting a better system performance. However, if any program writes to this memory area, a system error may result. The Choices: Disabled (default), Enabled. 14