Biostar A770E3 Bios Setup - Page 22

Chipset Menu

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A770E3 BIOS Manual 5 Chipset Menu T his submenu allows you to configure the speci fic features of the chipset installed on your system. T his chipset manage bus speeds and access to system memory resources, such as DRAM. It also coordinates communications with the PCI bus. Main Advanced PCIPnP BIOS S ETUP UTILITY Boot Chips et Perfo rmance Exit Advan ced Chipset S ettings > Sou thBridge Conf iguration > RX7 80 Configurat ion > OnB oard Peripher als Configur ation Opti ons for SB S elect Screen S elect Item En terG o to Sub Scr een F1 G eneral Help F1 0 S ave and Exit ES C E xit vxx.xx (C)C opyright 198 5-200x, Amer ican Megatre nds, Inc. SouthBridge Configuration BIOS S ETUP UTILITY Chips et South Bridge Chipse t Configurat ion Opti ons for SB H D Azal SB700 CIMx Verison : 4.6.0 > SB Azalia Audio Configuratio n OHCI HC(Bus 0 Dev 18 Fn o) OHCI HC(Bus 0 Dev 18 Fn 1) EHCI HC(Bus 0 Dev 18 Fn 2) OHCI HC(Bus 0 Dev 19 Fn 0) OHCI HC(Bus 0 Dev 19 Fn 1) EHCI HC(Bus 0 Dev 19 Fn 2) OHCI HC(Bus 0 Dev 20 Fn 5) OnChi p SATA Channe l OnChi p SATA Type SATA IDE Combined Mode [ Enabled] [ Enabled] [ Enabled] [ Enabled] [ Enabled] [ Enabled] [ Enabled] [ Enabled] [ Native IDE] [ Enabled] S elect Screen S elect Item En terG o to Sub Scr een F1 G eneral Help F1 0 S ave and Exit ES C E xit Power Saving Featu res [ Disabled] vxx.xx (C)C opyright 198 5-200x, Amer ican Megatre nds, Inc. 21

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A770E3 BIOS Manual
21
5 Chipset Menu
This submenu allows you to configure the specific features of the chipset installed on
your system. This chipset manage bus speeds and access to system memory
resources, such as DRAM. It also coordinates communications with the PCI bus.
BIOS SETUP UTILITY
Main
Advanced
PCIPnP
Boot
Chipset
Performance
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
Select Screen
Select Item
Go to Sub Screen
General Help
Save and Exit
Exit
Enter
F1
F10
ESC
Options for SB
Advanced Chipset Settings
> RX780 Configuration
> OnBoard Peripherals Configuration
> SouthBridge Configuration
Exit
SouthBridge Configuration
BIOS SETUP UTILITY
Chipset
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
Select Screen
Select Item
Go to Sub Screen
General Help
Save and Exit
Exit
Enter
F1
F10
ESC
> SB Azalia Audio Configuration
SouthBridge Chipset Configuration
SB700 CIMx Verison: 4.6.0
OHCI HC(Bus 0 Dev 18 Fn o)
[Enabled]
OHCI HC(Bus 0 Dev 18 Fn 1)
[Enabled]
EHCI HC(Bus 0 Dev 18 Fn 2)
[Enabled]
OHCI HC(Bus 0 Dev 19 Fn 0)
[Enabled]
OHCI HC(Bus 0 Dev 19 Fn 1)
[Enabled]
EHCI HC(Bus 0 Dev 19 Fn 2)
[Enabled]
OHCI HC(Bus 0 Dev 20 Fn 5)
[Enabled]
OnChip SATA Channel
[Enabled]
OnChip SATA Type
[Native IDE]
SATA IDE Combined Mode
[Enabled]
Power Saving Features
[Disabled]
Options for SB HD Azal