Biostar M7VIQ M7VIQ BIOS setup guide - Page 14

AGP & P2P Bridge Control

Page 14 highlights

M7VIQ BIOS Setup DRAM Timing This item determines DRAM clock/ timing follow SPD or not. The Choices: By SPD (default), Manual. DRAM CAS Latency When DRAM is installed, the number of clock cycles of CAS latency depends on the DRAM timing. The Choices: 2.5 (default), 2. Bank Interleave This item allows you to enable or disable the bank interleave feature. The Choices: Disabled (default), 2 bank, 4 bank. Precharge to Active (Trp) This items allows you to specify the delay from precharge command to activate command. The Choices: 2T, 3T (default). Active to Precharge (Tras) This items allows you to specify the minimum bank active time. The Choices: 6T (default), 5T. Active to CMD (Trcd) Use this item to specify the delay from the activation of a bank to the time that a read or write command is accepted. The Choices: 2T, 3T (default). DRAM Command Rate This item controls clock cycle that must occur between the last valid write operation and the next command. The Choices: 1T Command, 2T Command (default). AGP & P2P Bridge Control If you highlight the literal "Press Enter" next to the "AGP & P2P Bridge Control" label and then press the enter key, it will take you a submenu with the following options: AGP Aperture Size Select the size of the Accelerated Graphics Port (AGP) aperture. The aperture is a portion of the PCI memory address range dedicated for graphics memory address space. Host cycles that hit the aperture range are forwarded to the AGP without any translation. The Choices: 64M (default), 256M, 128M, 32M, 16M, 8M, 4M. AGP Driving Control By choosing "Auto" the system BIOS will the AGP output Buffer Drive strength P Ctrl by AGP Card. By choosing "Manual", it allows user to set AGP output Buffer Drive strength P Ctrl by manual. 13

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M7VIQ BIOS Setup
13
DRAM Timing
This item determines DRAM clock/ timing follow SPD or not.
The Choices: By SPD
(default), Manual.
DRAM CAS Latency
When DRAM is installed, the number of clock cycles of CAS latency depends on
the DRAM timing.
The Choices
:
2.5
(default), 2.
Bank Interleave
This item allows you to enable or disable the bank interleave feature.
The Choices: Disabled
(default), 2 bank, 4 bank.
Precharge to Active (Trp)
This items allows you to specify the delay from precharge command to activate
command.
The Choices
: 2T,
3T
(default).
Active to Precharge (Tras)
This items allows you to specify the minimum bank active time.
The Choices
:
6T
(default), 5T.
Active to CMD (Trcd)
Use this item to specify the delay from the activation of a bank to the time that a
read or write command is accepted.
The Choices
: 2T,
3T
(default).
DRAM Command Rate
This item controls clock cycle that must occur between the last valid write
operation and the next command.
The Choices:
1T Command,
2T Command
(default).
AGP & P2P Bridge Control
If you highlight the literal “Press Enter” next to the “AGP & P2P Bridge Control” label and
then press the enter key, it will take you a submenu with the following options:
AGP Aperture Size
Select the size of the Accelerated Graphics Port (AGP) aperture. The aperture is
a portion of the PCI memory address range dedicated for graphics memory
address space. Host cycles that hit the aperture range are forwarded to the AGP
without any translation.
The Choices: 64M
(default), 256M, 128M, 32M, 16M, 8M, 4M.
AGP Driving Control
By choosing “Auto” the system BIOS will the AGP output Buffer Drive strength
P Ctrl by AGP Card. By choosing “Manual”, it allows user to set AGP output
Buffer Drive strength P Ctrl by manual.