Biostar T41 HD Setup Manual - Page 25

B. Memory Integration Test M.I.T.

Page 25 highlights

T41 HD Notices: Not all types of Intel CPU perform above overclock setting ideally; the difference will be based on the selected CPU model. B. Memory Integration Test (M.I.T.) This function is under "Overclocking Navigator Engine" item. MIT allows users to test memory compatibilities, and no extra devices or software are needed. Step 1 The default setting under this item is "Disabled"; the condition parameter should be changed to "Enable" to proceed this test. Main Advanced PCIPnP BIOS SETUP UTILITY Boot Chipset T-Series Exit after overclocking. OverClock Navigator [Normal] =========== Automate OverClock System =========== Auto OverClock System [V6-Tech Engine] Manual OverClock System Intel(R) SpeedStep(tm) tech Ratio CMOS Setting [Enabled] [ x9.0] CPU Frequency Setting PCIE Frequency Setting [200] [100] FSB(Bsel) To NorthBridge Latch [Auto] DRAM Frequency [Auto] > ALL Voltage Configuration Configure DRAM Timing by SPD [Enabled] > G.P.U Phase Control Integrated Memory Test [Disabled] Options Disabled Enabled Select Screen Select Item EnterGo to Sub Screen F1 General Help F10 Save and Exit ESC Exit vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc. ↓ Main Advanced PCIPnP BIOS SETUP UTILITY Boot Chipset T-Series Exit after overclocking. Options OverClock Navigator [Normal] =========== Automate OverClock System =========== Auto OverClock System [V6-Tech Engine] Manual OverClock System Intel(R) SpeedStep(tm) tech Ratio CMOS Setting [Enabled] [ x9.0] CPU Frequency Setting PCIE Frequency Setting [200] [100] FSB(Bsel) To NorthBridge Latch [Auto] DRAM Frequency [Auto] > ALL Voltage Configuration Configure DRAM Timing by SPD [Enabled] > G.P.U Phase Control Integrated Memory Test [Enabled] Disabled Enabled Select Screen Select Item EnterGo to Sub Screen F1 General Help F10 Save and Exit ESC Exit vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc. Step 2 Save and Exit from CMOS setup and reboot the system to activate this test. Run this test for 5 minutes (minimum) to ensure the memory stability. Step 3 When the process is done, change the setting back from "Enable" to "Disable" to complete the test. 23

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T41 HD
23
Notices:
Not all types of Intel CPU perform above overclock setting ideally; the difference will be based on the
selected CPU model.
B. Memory Integration Test (M.I.T.)
This function is under “Overclocking Navigator Engine” item.
MIT allows users to test memory compatibilities, and no extra devices or
software are needed.
Step 1
The default setting under this item is “Disabled”; the condition parameter should
be changed to “Enable” to proceed this test.
BIOS SETUP UTILITY
Main
Advanced
PCIPnP
Boot
Chipset
T-Series
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
Select Screen
Select Item
Go to Sub Screen
General Help
Save and Exit
Exit
Enter
F1
F10
ESC
=========== Automate OverClock System ===========
============ Manual OverClock System ============
after overclocking.
OverClock Navigator
[Normal]
> G.P.U Phase Control
Auto OverClock System
[V6-Tech Engine]
Intel(R) SpeedStep(tm) tech
[Enabled]
Ratio CMOS Setting
[ x9.0]
CPU Frequency Setting
[200]
PCIE Frequency Setting
[100]
FSB(Bsel) To NorthBridge Latch [Auto]
DRAM Frequency
[Auto]
> ALL Voltage Configuration
Configure DRAM Timing by SPD
[Enabled]
Integrated Memory Test
[Disabled]
Exit
Options
Disabled
Enabled
BIOS SETUP UTILITY
Main
Advanced
PCIPnP
Boot
Chipset
T-Series
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
Select Screen
Select Item
Go to Sub Screen
General Help
Save and Exit
Exit
Enter
F1
F10
ESC
=========== Automate OverClock System ===========
============ Manual OverClock System ============
after overclocking.
OverClock Navigator
[Normal]
> G.P.U Phase Control
Auto OverClock System
[V6-Tech Engine]
Intel(R) SpeedStep(tm) tech
[Enabled]
Ratio CMOS Setting
[ x9.0]
CPU Frequency Setting
[200]
PCIE Frequency Setting
[100]
FSB(Bsel) To NorthBridge Latch [Auto]
DRAM Frequency
[Auto]
> ALL Voltage Configuration
Configure DRAM Timing by SPD
[Enabled]
Integrated Memory Test
[Enabled]
Exit
Options
Disabled
Enabled
Step 2
Save and Exit from CMOS setup and reboot the system to activate this test.
Run this test for 5 minutes (minimum) to ensure the memory stability.
Step 3
When the process is done, change the setting back from “Enable” to “Disable”
to complete the test.