Biostar TZ77MXE Bios Manual - Page 10

Execute-Disable Bit, Intel Virtualization Technology, Hardware Prefetcher, Adjacent Cache Line

Page 10 highlights

TZ77B/TZ75B/T77 UEFI BIOS Manual Execute-Disable Bit XD can prevent certain classes of malicious buffer overflow attacks when combined with a supporting OS (Windows Server 2003 SP1, Windows XP SP2, SuSE Linux 9.2, RedHat Enterprise 3 Update 3.). Options: Enabled (Default) / Disabled Intel Virtualization Technology Virtualization Technology can virtually separate your system resource into several parts, thus enhance the performance when running virtual machines or multi interface systems. Options: Disabled (Default) / Enabled Hardware Prefetcher The processor has a hardware prefetcher that automatically analyzes its requirements and prefetches data and instructions from the memory into the Level 2 cache that are likely to be required in the near future. This reduces the latency associated with memory reads. Options: Enabled (Default) / Disabled Adjacent Cache Line Prefetch The processor has a hardware adjacent cache line prefetch mechanism that automatically fetches an extra 64-byte cache line whenever the processor requests for a 64-byte cache line. This reduces cache latency by making the next cache line immediately available if the processor requires it as well. Options: Enabled (Default) / Disabled CPU C3 Report This item enables or disables CPU C3 (ACPI C2) repost to OS . Options: Enabled (Default) / Disabled CPU C6 Report This item enables or disables CPU C3 (ACPI C3) repost to OS . Options: Enabled (Default) / Disabled 9

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TZ77B/TZ75B/T77 UEFI BIOS Manual
9
Execute-Disable Bit
XD can prevent certain classes of malicious buffer overflow attacks when combined
with a supporting OS (Windows Server 2003 SP1, Windows XP SP2, SuSE Linux
9.2, RedHat Enterprise 3 Update 3.).
Options:
Enabled (Default) / Disabled
Intel Virtualization Technology
Virtualization Technology can virtually separate your system resource into several
parts, thus enhance the performance when running virtual machines or multi
interface systems.
Options:
Disabled (Default) / Enabled
Hardware Prefetcher
The processor has a hardware prefetcher that automatically analyzes its
requirements and prefetches data and instructions from the memory into the Level 2
cache that are likely to be required in the near future. This reduces the latency
associated with memory reads.
Options:
Enabled (Default) / Disabled
Adjacent Cache Line Prefetch
The processor has a hardware adjacent cache line prefetch mechanism that
automatically fetches an extra 64-byte cache line whenever the processor requests
for a 64-byte cache line. This reduces cache latency by making the next cache line
immediately available if the processor requires it as well.
Options:
Enabled (Default) / Disabled
CPU C3 Report
This item enables or disables CPU C3 (ACPI C2) repost to OS .
Options:
Enabled (Default) / Disabled
CPU C6 Report
This item enables or disables CPU C3 (ACPI C3) repost to OS .
Options:
Enabled (Default) / Disabled