Compaq 124708-001 The Intel processor roadmap for industry-standard servers te - Page 14
Enhanced SpeedStep® Technology
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The four-core Intel Xeon 7300 series processor (Tigerton) consists of two dual-core silicon chips on a single ceramic module, similar to the Xeon 5300 series processors. Each pair of cores shares a L2 cache; up to 4 MB of L2 cache can be allocated to one core. Intel states the Xeon 7300 series processors offer more than twice the performance and more than three times the performance-per-watt of the previous generation 7100 series, which is based on the NetBurst microarchitecture. Xeon 7300 series processors are empowered by the Intel® 7300 Chipset, which features Dedicated High-Speed Interconnects (DHSI). DHSI is an independent point-to-point interface between the chipset and each processor that provides full front side bus bandwidth to each processor (Figure 9). The point-to-point interface significantly reduces data traffic and provides lower latencies and greater available bandwidth. The chipset also features a 64-MB snoop filter that manages data coherency across processors, eliminating unnecessary snoops and boosting available bandwidth. Figure 9. Intel Xeon 7300 series processors with the Intel 7300 Chipset and Dedicated High-Speed Interconnects Based on the 45nm Penryn core, the 6-core Dunnington processor is the successor to Tigerton and has a 16MB L3 "last level cache." Enhanced SpeedStep® Technology Four-core Intel Xeon 5300 and 7300 series processors support Enhanced Intel SpeedStep Technology. These processors have power state hardware registers that are available (exposed) to allow IT organizations to control the processor's performance and power consumption. These capabilities are implemented through Intel's Enhanced Intel SpeedStep Technology and demandbased switching. With the appropriate ROM firmware or operating system interface, programmers can use the exposed hardware registers to switch a processor between different performance states, or P-states3, at different power consumption levels. For example, HP developed a power management feature called HP Power Regulator that uses P-state registers to control processor power use and performance. These capabilities have become increasingly important for power and cooling management in high-density data centers. With the combination of this technology and data-center management tools such as Insight Power Manager, IT organizations have more control over the power consumption of all the servers in the data center. 3 The ACPI body defines P-states as processor performance states. For Intel and AMD processors, a P-state is defined by a fixed operating frequency and voltage. 14