Gateway E-9232T Gateway E-9232T Server User Guide - Page 72

APPENDIX A: Server Specifications Electronic specifications Memory map Address Range (hex) 0 to 07FFFFh 0A0000h to 0BFFFFh 0C0000h and 0DFFFFh 0E0000h to 0FFFFFh 0E0000h to 0EFFFFh FC000000h to FFFFFFFFh Amount 640 KB 128 KB 128 KB 128 KB 2 MB 64 MB Function DOS region, base system memory Video or SMM memory Expansion card BIOS and buffer area System BIOS Extended system BIOS PCI memory space Interrupts I The following table reflects a typical configuration, but you can change these interrupts. Use this information to determine how to program each interrupt. The actual interrupt map is defined using configuration registers in the ICH5-R (I/O controller). I/O Redirection Registers in the I/O APIC are provided for each interrupt signal. The signals define hardware interrupt signal characteristics for APIC messages sent to local APIC(s). Important If you disable an IDE controller to free the interrupt for that controller, you must physically unplug the IDE cable from the system board. Simply disabling the drive by configuring the BIOS does not make the interrupt available. Interrupt IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ8 IRQ9 IRQ10 IRQ11 IRQ12 IRQ13 Description Timer/counter, HPET #0 in legacy replacement Mode. In APIC mode, cascade from 8259 controller 1 Keyboard controller Slave controller INTR output. In APIC mode Timer/counter, HPET #0 Serial port A Serial port B Parallel port Diskette controller Real-time clock/HPET#1 in legacy replacement mode Generic, Option for SCI Generic, Option for SCI HPET #2, option for SCSI, TCO Mouse controller System interrupt/FERR 66