HP 273914-B21 HP Smart Array Controller technology, 3rd edition - Page 21

FBWC architecture, The FBWC uses NAND

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Figure 7. HP flash-backed write-cache and Super-cap power supply The FBWC uses NAND6 flash devices to retain cache data and super-capacitors (Super-caps) instead of batteries to provide power during a power loss. The FBWC offers significant advantages over the HP Battery-backed write-cache (BBWC) system. Since the FBWC writes the contents of memory to flash devices, there is no longer a 48 hour battery life limitation and the data will be posted to the disk drive on the next power up. FBWC architecture The FBWC DDR2 mini-DIMM cache module is specifically designed for the present generation of PCIe2.0, SAS-based Smart Array controllers based on the PMC PM8011 max SAS SRC 8x6G RAID on a chip (RoC). The primary FBWC components consist of the cache module, Super-caps with integrated charger, and a RoC located on the system board, shown in Figure 8. 6 Non-volatile semiconductor memory that can be electronically erased and reprogrammed. No power is needed to maintain data stored in the chip 21

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Figure 7.
HP flash-backed write-cache and Super-cap power supply
The FBWC uses NAND
6
flash devices to retain cache data and super-capacitors (Super-caps) instead
of batteries to provide power during a power loss. The FBWC offers significant advantages over the
HP Battery-backed write-cache (BBWC) system. Since the FBWC writes the contents of memory to
flash devices, there is no longer a 48 hour battery life limitation and the data will be posted to the
disk drive on the next power up.
FBWC architecture
The FBWC DDR2 mini-DIMM cache module is specifically designed for the present generation of
PCIe2.0, SAS-based Smart Array controllers based on the PMC PM8011 max SAS SRC 8x6G RAID
on a chip (RoC). The primary FBWC components consist of the cache module, Super-caps with
integrated charger, and a RoC located on the system board, shown in Figure 8.
6
Non-volatile semiconductor memory that can be electronically erased and reprogrammed. No power is needed to maintain data stored in the
chip
21