Intel D848PMB Technical Product Specification - Page 102
Chipset Configuration Submenu
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Intel Desktop Board D848PMB Technical Product Specification 4.4.9 Chipset Configuration Submenu To access this menu, select Advanced on the menu bar and then Chipset Configuration. Maintenance Main Advanced Security Power PCI Configuration Boot Configuration Peripheral Configuration Drive Configuration Floppy Configuration Event Log Configuration Video Configuration USB Configuration Chipset Configuration Fan Control Configuration Hardware Monitoring Boot Exit The submenu represented in Table 61 is for configuring chipset options. Table 61. Chipset Configuration Submenu Feature ISA Enable Bit Options • Disabled • Enabled (default) PCI Latency Timer Extended Configuration SDRAM Frequency (Note 1) • 32 (default) • 64 • 96 • 128 • 160 • 192 • 224 • 248 • Default (default) • User Defined • Auto (default) • 266 MHz • 320 MHz (Note 2) • 400 MHz (Note 3) Description When set to Enable, a PCI-to-PCI bridge will only recognize I/O addresses that do not alias to an ISA range (within the bridge's assigned I/O range). Allows you to control the time (in PCI bus clock cycles) that an agent on the PC bus can hold the bus when another agent has requested the bus. Allows the setting of extended configuration options. Allows override of the detected memory frequency. NOTE: If SDRAM Frequency is changed, you must reboot for the change to take effect. After changing this setting and rebooting, the System Memory Speed parameter in the Main menu will reflect the new value. continued 102