Intel SL79K Specification Update - Page 49
VERR/VERW Instructions May Cause #GP Fault When Descriptor Is in Non
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Errata R R52. Incorrect Access Controls to MSR_LASTBRANCH_0_FROM_LIP MSR Registers Problem: When an access is made to the MSR_LASTBRANCH_0_FROM_LIP MSR register, an expected #GP fault may not happen. Implication: A read of the MSR_LASTBRANCH_0_FROM_LIP MSR register may not cause a #GP fault. Workaround: It is possible for the BIOS to contain a workaround for this erratum Status: For the steppings affected, see the Summary Tables of Changes. R53. Recursive Page Walks May Cause a System Hang Problem: A page walk, accessing the same page table entry multiple times but at different levels of the page table, which causes the page table entry to have its Access bit set may result in a system hang. Implication: When this erratum occurs, the system may experience a hang. Workaround: It is possible for the BIOS to contain a workaround for this erratum. Status: For the steppings affected, see the Summary Tables of Changes. R54. WRMSR to bit[0] of IA32_MISC_ENABLE Register Changes Only One Logical Processor on a Hyper-Threading Technology Enabled Processor Problem: On an HT enabled processor, a write to the fast-strings feature bit[0] of IA32_MISC_ENABLE register changes the setting for the current logical processor only. Implication: Due to this erratum, the non-current logical processor may not update fast-strings feature bit[0] of IA32_MISC_ENABLE register. Workaround: BIOS may set the fast-strings enable bit on both logical processors to workaround this erratum. It is possible for the BIOS to contain a workaround for this erratum. Status: For the steppings affected, see the Summary Tables of Changes. R55. VERR/VERW Instructions May Cause #GP Fault When Descriptor Is in Noncanonical Space Problem: If a descriptor referenced by the selector specified for the VERR or VERW instructions is in noncanonical space, it may incorrectly cause a #GP fault on a processor supporting Intel® Extended Memory 64 Technology (Intel® EM64T). Implication: Operating systems or drivers that reference a selector in non-canonical space may experience an unexpected #GP fault. Intel has not observed this erratum with any commercially available software. Workaround: It is possible for the BIOS to contain a workaround for this erratum. Status: For the steppings affected, see the Summary Tables of Changes. Intel® Pentium® 4 Processor on 90 nm Process Specification Update 49