LG L1511S Service Manual - Page 21

Thc63lvdm83r

Page 21 highlights

THC63LVDM83R PIN CONFIGURATION THC63LVDM83R RS 1 TD1 2 TA5 3 TA6 4 GND 5 TB0 6 TB1 TD2 7 8 VCC 9 TD3 10 TB2 11 TB3 12 GND TB4 13 14 TB5 15 TD4 16 R/F 17 TD5 18 TB6 19 TC0 20 GND 21 TC1 22 TC2 23 TC3 24 TD6 25 VCC 26 TC4 27 TC5 28 56 55 54 TA4 TA3 53 52 51 TA2 GND TA1 50 49 TA0 TD0 LVDS GND 48 TA- 47 TA+ 46 TB- 45 TB+ 44 43 LVDS VCC LVDS GND 42 TC- 41 TC+ 40 39 TCLK TCLK+ 38 TD- 37 TD+ 36 LVDS GND 35 PLL GND 34 PLL VCC 33 PLL GND 32 /PDWN 31 CLK IN 30 TC6 29 GND BLOCK DIAGRAM 7 TA0-6 7 TB0-6 TC0-6 7 TD0-6 7 TRANSMITTER CLOCK IN (20 to 85MHz) R/F /PDWN RS THC63LVDM83R DATA (LVDS) TA +/- TTL PARALLEL TO SERIAL TB +/- TC +/- TD +/- (140-595Mbit/On Each LVDS Channel) PLL TCLK +/- CLOCK (LVDS) 20~85MHz

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THC63LVDM83R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
39
38
37
36
35
34
33
32
31
30
29
43
42
41
40
RS
TD1
TA5
TA6
GND
TB0
TB1
TD2
VCC
TD3
TB2
TB3
GND
TB4
TB5
TD4
R/F
TD5
TB6
TC0
GND
TC1
TC2
TC3
TD6
VCC
TC4
TC5
TA4
TA3
TA2
GND
TA1
TA0
TD0
LVDS GND
TA-
TA+
TB-
TB+
LVDS VCC
LVDS GND
TC-
TC+
TCLK -
TCLK+
TD-
TD+
LVDS GND
PLL GND
PLL VCC
PLL GND
/PDWN
CLK IN
TC6
GND
THC63LVDM83R
DATA
(LVDS)
TA0-6
TB0-6
TC0-6
TD0-6
7
7
7
7
TRANSMITTER
CLOCK IN
(20 to 85MHz)
R/F
/PDWN
RS
TB +/-
TA +/-
TC +/-
TD +/-
(140-595Mbit/On Each
LVDS Channel)
TCLK +/-
CLOCK
(LVDS)
20~85MHz
TTL PARALLEL TO SERIAL
PLL
THC63LVDM83R
PIN CONFIGURATION
BLOCK DIAGRAM