Lenovo ThinkPad 770Z Technical Reference Manual for the ThinkPad 770 - Page 52

System Control Port A (Hex 0092), Bits 7-4, Bit 3, System Board

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System Control Port A (Hex 0092) Bit Function 7-4 Reserved 3 Security lock latch 2 Reserved (must be set to 0) 1 Alternate gate A20 0 Alternate hot reset Figure 2-30. System Control Port A (Hex 0092) Bits 7-4 Bit 3 Bit 2 Bit 1 Bit 0 These bits are reserved. This bit provides a security lock for the secured area of RT/CMOS. If this bit is set to 1, the 8-byte power-on password is locked by the software. After this bit is set by POST, it can be cleared only by turning the system off. This bit is reserved. This bit is used to enable the 'address 20' signal (A20) when the microprocessor is in the real address mode. If this bit is set to 0, A20 cannot be used in real mode addressing. This bit is set to 0 during a system reset. This bit provides an alternative method of resetting the system microprocessor. This alternative method supports operating systems requiring faster operation than that provided on the IBM Personal Computer AT. Resetting the system microprocessor switches the microprocessor from protected mode to real address mode. This bit is set to 0 by either a system reset or a write operation. If a write operation changes this bit from 0 to 1, the 'processor reset' signal is pulsed after the reset has occurred. While the reset is occurring, the latch remains set so that POST can read this bit. If the bit is set to 0, POST assumes that the system was just powered on. If the bit is set to 1, POST assumes that the microprocessor has been switched from protected mode to real mode. If bit 0 is used to reset the system microprocessor to the real mode, use the following procedure: 1. Disable all maskable and nonmaskable interrupts. 2-30 System Board

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System Control Port A (Hex 0092)
Figure
2-30.
System Control Port A (Hex 0092)
Bit
Function
7–4
Reserved
3
Security lock latch
2
Reserved (must be set to 0)
1
Alternate gate A20
0
Alternate hot reset
Bits 7–4
These bits are reserved.
Bit 3
This bit provides a security lock for the secured area of
RT/CMOS.
If this bit is set to 1, the 8-byte power-on
password is locked by the software.
After this bit is set
by POST, it can be cleared only by turning the system
off.
Bit 2
This bit is reserved.
Bit 1
This bit is used to enable the ‘address 20’ signal (
A20
)
when the microprocessor is in the real address mode.
If
this bit is set to 0,
A20
cannot be used in real mode
addressing.
This bit is set to 0 during a system reset.
Bit 0
This bit provides an alternative method of resetting the
system microprocessor.
This alternative method
supports operating systems requiring faster operation
than that provided on the IBM Personal Computer AT.
Resetting the system microprocessor switches the
microprocessor from protected mode to real address
mode.
This bit is set to 0 by either a system reset or a write
operation.
If a write operation changes this bit from 0 to
1, the ‘processor reset’ signal is pulsed after the reset
has occurred.
While the reset is occurring, the latch
remains set so that POST can read this bit.
If the bit is
set to 0, POST assumes that the system was just
powered on.
If the bit is set to 1, POST assumes that
the microprocessor has been switched from protected
mode to real mode.
If bit 0 is used to reset the system microprocessor to the
real mode, use the following procedure:
1. Disable all maskable and nonmaskable interrupts.
2-30
System Board