MSI 651M-V User Guide - Page 49

PCI/VGA Palette Snoop, VGA Palette, Snoop Bit Setting, Action, PCI Device]

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Page 49 highlights

BIOS Setup IRQ Resources list IRQ 3/4/5/7/9/10/11/12/14/15 for users to set each IRQ a type depending on the type of device using the IRQ. Settings are: [PCI Device] [Reserved] For Plug & Play compatible devices designed for PCI bus architecture. The IRQ will be reserved for further request. PCI/VGA Palette Snoop When set to [Enabled], multiple VGA devices operating on different buses can handle data from the CPU on each set of palette registers on every video device. Bit 5 of the command register in the PCI device configuration space is the VGA Palette Snoop bit (0 is disabled). For example, if there are two VGA devices in the computer (one PCI and one ISA) and the: VGA Palette Snoop Bit Setting [Disabled] Action Data read or written by the CPU is only directed to the PCI VGA device's palette registers. [Enabled] Data read or written by the CPU is directed to both the PCI VGA device's palette registers and the ISA VGA device's palette registers, permitting the palette registers of both VGA devices to be identical. The setting must be set to [Enabled] if any ISA bus adapter in the system requires VGA palette snooping. 3-19

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3-19
BIOS Setup
The setting must be set to [Enabled] if any ISA bus adapter in the system requires
VGA palette snooping.
IRQ Resources list IRQ 3/4/5/7/9/10/11/12/14/15 for users to set each IRQ a type
depending on the type of device using the IRQ. Settings are:
[PCI Device]
For Plug & Play compatible devices designed for PCI bus
architecture.
[Reserved]
The IRQ will be reserved for further request.
PCI/VGA Palette Snoop
When set to [Enabled], multiple VGA devices operating on different buses can handle
data from the CPU on each set of palette registers on every video device. Bit 5 of the
command register in the PCI device configuration space is the VGA Palette Snoop bit
(0 is disabled). For example, if there are two VGA devices in the computer (one PCI
and one ISA) and the:
VGA Palette
Snoop Bit Setting
Action
[Disabled]
Data read or written by the CPU is only directed to the PCI
VGA device’s palette registers.
[Enabled]
Data read or written by the CPU is directed to both the PCI
VGA device’s palette registers and the ISA VGA device’s
palette registers, permitting the palette registers of both VGA
devices to be identical.