Nintendo NES-001 User Guide

Nintendo NES-001 - Entertainment System Game Console Manual

Nintendo NES-001 manual content summary:

  • Nintendo NES-001 | User Guide - Page 1
    Nintendo Entertainment System Documentation Version 1.0 August 2004 Patrick Diskin
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    Preface Abstract The Nintendo Entertainment System (NES) was the world's most widely used videogames console during the 1980s. From its initial release in 1983 until it was discontinued in 1995 the console brought gaming into more homes than ever before and paved the way for the videogame industry
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    The Japanese console market was still doing well and Yamauchi felt that Nintendo could become the market leaders through a combination of quality games and improved hardware sold at a lower price than competitors (profit would be made on the games). Figure 1-1. The Nintendo Entertainment System and
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    the previous year, the NES became available in America in 1985. As a result of strict quality controls on third party software, combined with Nintendo's own games (including Super Mario Bros., The Legend of Zelda and Metroid) the console became a huge success. In 1987, the NES became the top selling
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    , all hardware has a limited lifespan and eventually there will be no working NES consoles to still play the games on. The games themselves often featured battery backed RAM to enable progress to be saved and Nintendo only predicted the battery life as five years. There are multiple options which
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    branch and jump instructions and to produce accurate code [20]. The NES is perhaps the most widely emulated console with a number of emulators already available of varying quality. Writing a NES emulator remains a very challenging project, requiring a detailed understanding of how the system works
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    75 years after they were made. Nintendo are very much against emulation. The company acted against the developers of UltraHLE [24], an emulator for their Nintendo 64 console, which they claimed violated copyright. Nintendo's objection was understandable as the console was still in use when UltraHLE
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    can be transferred to a device via a write to a specific location in memory. Input devices are discussed in Part 5, the function of the memory mapped I/O is discussed throughout the document and specifically in Appendix B. 8
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    bus is used to read or write the byte to the selected address. Note that ROM is read-only and is accessed via a MMC, to allow bank switching to occur. The I/O registers are used to communicate with the other components of the system, the PPU and the control devices. Figure 2-2. Processor diagram. 9
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    bus and as such could support 64 KB of memory with addresses from $0000-$FFFF. Figure 2-5 is the CPU memory map used by the NES, showing the layout of for storing save games. From $8000 onwards is the addresses allocated to cartridge PRG-ROM. Games with only one 16 KB bank of PRG-ROM will load it
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    and Y, which can be used to store data or control information temporarily. 2.3.1 Program Counter (PC) The program counter is a 16-bit register which holds the address of the next instruction to be executed. As instructions are executed, the value of the program counter is updated, usually moving on
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    carry flag is set if the last instruction resulted in an overflow from bit 7 or an underflow from bit 0. For example performing 255 + 1 would result in an answer of 0 with the carry bit set. This allows the system to perform calculations on numbers longer than 8-bits by performing the calculation
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    attention, but can be triggered by software. The NES has three different types of interrupt, NMI, From Interrupt) instruction, pull the program counter and status register values from the stack by use of the BRK (Break) instruction. When an IRQ occurs the system jumps to the address located at $FFFE
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    first byte is the opcode and the remaining bytes are the operands. Instructions fit into several functional groups [3]: • Load / Store Operations - Load / Decrements - Increment or decrement the X or Y registers or a value stored in memory. • Shifts - Shift the bits of either the accumulator
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    sequence, resuming from a specified address. • Branches - Break sequential execution sequence, resuming from a specified address, if a condition is met. The condition involves examining a specific bit in the status register. • Status Register Operations - Set or clear a flag in the status register
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    3 - Picture Processing Unit 3.1 2C02 Overview Ricoh also supplied the 2C02 to serve as PPU. The PPU's registers are PPU has its own memory, known as VRAM (Video RAM). Like the CPU, the PPU can also address 64 KB of memory although it only has 16 KB of physical RAM. The PPU's memory map is shown in
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    are mirrored every 8 bytes in the region $2008-$3FFF. A summary of all I/O registers can be found in Appendix B. The actions of the PPU can be controlled by the CPU by writing to $2000 and $2001, known as PPU
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    of 512 cycles (about 4.5 scanlines worth) after which the CPU can resume. This is considerably less than would be required to copy manually through the CPU. 3.4 Colour Palette The NES has a colour palette containing 52 colours although there is actually room for 64. However, not all of these can
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    two bits of the colour are taken from the attribute tables. The colours shown are not genuine NES colour palette values. 3.6 Name Tables / Attribute Tables Name tables are essentially a matrix of tile numbers, pointing to the tiles stored in the pattern tables. The name tables are 32x30 tiles and
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    most significant two colour bits for the specified square. Square 0 $0 $1 $2 $3 Square 1 $4 $5 $6 $7 Square 2 $8 $9 $A $B Square 3 $C $D $E $F Figure 3-3. 4x4 tile group layout. Adapted from [20]. The NES only has 2 KB to store name tables and attribute tables, allowing it to store two of each
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    has higher priority. On each line the system calculates which sprites are on that line and draws them, lowest priority first, to ensure high priority sprites are drawn on top. Only eight sprites are allowed per scanline, and the system indicates when this number has been reached by setting bit 5 of
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    in it is in the same position as a non-transparent background pixel, the system sets the sprite 0 hit flag in bit 6 of $2002. Therefore if is constructed of eight separate 8x8 sprites. Figure 3-9. Character construction. Adapted from [33]. 3.8 Scrolling The background can be scrolled horizontally or
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    which is cut in half, not all of this area has yet been filled by the system. Some games only allow movement in one direction while others allow scrolling in both directions. This is described by Nintendo as follows [33]: "The PPU may display only 960 characters at a time, but it actually stores
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    does not apply to games which allow simultaneous horizontal Adapted from [7]. The way scrolling works is described in [8] and is summarised here. The system maintains a 16-bit VRAM address register, the value the x-scroll and the y-scroll indicate tile numbers, this allows 32 tiles across the screen
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    NES connects to a television to display the game to user. As a result different versions of the system much of Asia, Africa and Australasia [35]. Table 3-1 shows the differences between NTSC and PAL versions of the NES of NTSC and PAL NES systems. Images are displayed on NES, there are
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    NES cartridge is bigger, much of it is just wasted space. Famicom cartridges had a 60-pin connection while NES cartridges had a 72-pin connection, making the two formats incompatible without an adapter [28]. Figure 4-2 shows the inside of a NES, Figure 4-2. Inside the NES, the 72-pin connector
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    the NES' longevity, allowing it to survive technological deficiencies. Several memory mappers were used by the NES and a comprehensive list can switching of NES games. UNROM only allowed switching of PRG-ROM banks. It provided no support for CHR-ROM. The maximum number of 16 KB PRG-ROM banks using
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    with PRG-ROM then CHR-ROM. The format allows for up to 256 different memory mappers. Each mapper is assigned a specific number and the mapper number can be obtained by shifting bits 4-7 of control byte 2 to the left by 4 bits and then adding the bits 4-7 of control byte 1. A complete list of mappers
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    on the iNES format, it is currently supported by fewer emulators and less ROM files are available in the format. The iNES format should be gradually replaces by UNIF within the next few years. 4.2 Famicom Disk System Partially in response to rising chip prices and partially as part of an effort
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    Other cheat devices worked by locking the value of a given memory location. For example if the game stores the number of lives remaining in location $1000, then locking this to 5 would give the gamer an infinite number of lives. The Game Genie, however, works on ROM rather than RAM. It monitors the
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    is attached to port $4016, the second to $4017. Using a four-player adapter it was possible to connect four controllers to the system, although this was rare. In this case controllers 1 and 3 were attached to $4016 and 2 and 4 to $4017. The next eight reads would get the status of the second
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    5-2. Original NES Zapper light-gun [45]. "The Zapper works by receiving the light from the screen. The contrast and brightness controls of the -guns manual as quoted in [44]. Essentially, the Zapper works by measuring the intensity of the light at the point it is aimed at. When the system detects
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    + 15 = 47. The binary number system uses base 2 with digits 0 and 1. This system is also frequently used and any numbers written in this format will be indicated being set and the value becoming -128. Around 0, the value changes smoothly between positive and negative numbers. Therefore with unsigned
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    Bit 6 - Changes PPU between master and slave modes. This is not used by the NES. • Bit 7 - Indicates whether a NMI should occur upon V-Blank. PPU Control Register 2: $2002 Read • Bit 0 - Indicates whether the system is in colour (0) or monochrome mode (1), • Bit 1 - Specifies whether to clip the
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    2. pAPU Delta Modulation Control Register. pAPU Delta Modulation D/A Register. pAPU Delta Modulation Address Register. pAPU Delta Modulation Data Length Register. Sprite DMA Register: Writes cause a DMA transfer to occur from CPU memory at address $100 x n, where n is the value written, to SPR-RAM
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    on [9]: iNES Mapper Number 0 1 2 3 4 5 6 7 8 9 10 11 12 15 16 17 18 19 20 21 22 23 24 25 32 33 34 64 65 66 67 68 69 71 78 91 Mapper Name NROM, no mapper Nintendo MMC1 UNROM switch CNROM switch Nintendo MMC3 Nintendo MMC5 FFE F4xxx AOROM switch FFE F3xxx Nintendo MMC2 Nintendo MMC4 ColorDreams chip
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    no support for VROM, games using it have 8 KB of VRAM at $0000 in PPU memory. D.2 CNROM Switch Address $8000-$FFFF Data 8 KB CHR-ROM bank number to either be 8 KB bank n, or 4 KB banks n and (n + 1) where n is the value of bits 0-3. • Bit 4 - 256 KB selection register 0. Stores the low bit of 256
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    supported by the implementation of MMC1 in NES#. D.4 MMC3 Address $8000 $8001 $A000 $A001 $C000 $C001 $E000 $E001 Data • Bits 0-2 - Command number Swap PRG-ROM bank at either $8000 or $A000 based on bit 6. • 7 - Swap PRG-ROM bank at value to be copied to the IRQ Counter Register later. IRQ Control
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    than with addressing modes which take two operands. An example of a zero page instruction is AND $12. Figure E-1. Zero page addressing. E.2 Indexed Zero Page Indexed zero page addressing takes a single operand and adds the value of a register to it to give an address in zero page ($0000-$00FF
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    Figure E-2. Indexed zero page addressing. E.3 Absolute In absolute addressing, the address of the data to operate on is specified by the two operands supplied, least significant byte first. An example of an absolute instruction is AND $1234. Figure E-3. Absolute addressing. 40
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    forming a 16-bit address, least significant byte first, and adds the value of a register to it to give the address where the data The diagram shows the general form of indirect addressing. However, with the JMP instruction, instead of yyxx pointing to the data and the program counter being increased
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    LSR (Logical Shift Right), ROL (Rotate Left) and ROR (Rotate Right). E.8 Immediate Instructions which use immediate addressing operate directly on a constant supplied as an operand to the instruction. Immediate instructions are indicated by prefacing the operand with #, for example AND #$12. Figure
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    E.9 Relative Relative addressing is used in branch instructions. This addressing mode causes the value of the program counter to change if a certain condition is met. The condition is dependant on the instruction. The program counter increments by two regardless of the outcome of the condition but
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    E.11 Indirect Indexed Indirect indexed (also known as post-indexed) addressing takes a single operand which gives the zero page address of the least significant byte of a 16-bit address which is then added to the Y register to give the target address. For example, if the operand is bb, 00bb is xx
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    0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F Figure F-1. NES colour palette. RGB Value 75, 75, 75 27, 1B, 8F 00, 00, AB 47, 00, 9F 8F, 00, 77 AB, 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F RGB Value FF, FF, FF 3F, BF, FF 5F, 97, FF A7, 8B, FD F7, 7B, FF FF
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    Hansen, "Nintendo Entertainment System / Famicom Console Information", Console Database, http://consoledatabase.retrofaction.com/consoleinfo/nes/ [14] GameSpy, "The Museum: Nintendo Entertainment System", GameSpy, http://www.classicgaming.com/museum/nes/ [15] Aaron Mims, The Video Game Museum, http
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    33] Nintendo, "Nintendo Power Issue 22", NESPlayer.com, http://www.nesplayer.com/technical/tech.htm [34] Wikipedia, "NTSC", Wikipedia, http://en.wikipedia.org/wiki/NTSC, 2004 [35] Wikipedia, "PAL", Wikipedia, http://en.wikipedia.org/wiki/PAL, 2004 [36] Video Game Exchange, "NES 72-pin Repair", Video
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Nintendo Entertainment
System Documentation
Version 1.0
August 2004
Patrick Diskin