Pioneer PD-F1007 Service Manual - Page 45
PD4996A IC351: MAIN BOARD ASSY, System Control Micro-computer - dac
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PD-F1007 PD4996A (IC351: MAIN BOARD ASSY) System Control Micro-computer Pin Function No. Symbol Name I/O Description 1 P120/RTP0 DLAT O DAC control data, latch pulse output 2 P121/RTP1 XLAT O LSI control data, latch pulse output 3 P122/RTP2 Not used O Output of "L" 4 P123/RTP3 INSD I Slider INSIDE switch input (L: INSIDE) 5 P124/RTP4 OPEN I Hood open switch input (L: Opening completed) 6 P125/RTP5 CLS I Hood close switch input (L: Closing completed) 7 P126/RTP6 EJCT I Loading out switch input (L: Ejection completed) 8 P127/RTP7 CLMP I Loading mechanism clamping switch input (L: Clamping completed) 9 IC IC - GND 10 X2 11 X1 X2 Connected to System clock oscillator - (4.19 MHz) X1 12 VDD VDD - +5V 13 XT2 XT2 - Not Connect (open) 14 P07/XT1 Not used I Input of 5 V (only for input) 15 RESET RESET I CPU reset (L: Reset) 16 P00/INTP0/TI00 DREQ I Communication start request input from the SUD microcomputer (L: Communication start) 17 P01/INTP1/TI01 Not used O Output of "L" 18 P02/INTP2 DPOS I Pulse input for disc position detection 19 P03/INTP3 SCOR I Subcode synchronization S0 + S1 input 20 P04/INTP4 DISC I Disc detection pulse input (L: Disc present) 21 P05/INTP5 Not used O Not used 22 P06/INTP6 DCNT2 I Disc count pulse input 2 23 AVdd AVdd - VDD 24 AVref0 AVref0 - GND 25 P10/ANI0 Not used O Output of "L" 26 P11/ANI1 MUTM O Master side mute output (L: Mute) 27 P12/ANI2 MUTA O Audio muting output (L: Mute) 28 P13/ANI3 Not used O Output of "L" 29 P14/ANI4 MSIN I Master input (response from the slave) 30 P15/ANI5 KYCON O Keyboard power supply control (H: Power ON) No. Symbol Name I/O Description 31 P16/ANI6 SYNC1 I Synchronization input (pull-up required) 32 P17/ANI7 SYNC3 O Synchronization output 33 AVSS AVSS - GND 34 P130/AN00 Not used O Output of "L" 35 P131/AN01 Not used 36 AVref1 AVref1 - VDD 37 P70/SI2/RxD SRDT I CD TEXT data input 38 P71/SO2/TxD Not used O Output of "L" 39 P71/SCK2/ASCK SCLK O CD TEXT data fetch clock output 40 Vss Vss - GND 41 P20/SI1 KYDT I Communication data input in regard to the SUB microcomputer 42 P21/SO1 DPDT O Communication data output in regard to the SUB microcomputer 43 P22/SCK1 DCLK O Communication clock in regard to the SUB microcomputer 44 P23/STB DCS O Communication request output in regard to the SUB microcomputer (H = L: Communication request) 45 P24/BUSY Not used O Output of "L" 46 P25/SI0/SB0 SQSO I Q data serial input (combined use for FCOK/GFS/SENS) 47 P26/SO0/SB1 MDAT O LSI control data serial output 48 P27/SCK0 CLOK O Serial clock 49 P80/A0 | | 56 P87/A7 A0 |O A7 57 P40/AD0 A4 O 58 P41/AD1 A12 O 59 P42/AD2 A10 O External RAM address line 60 P43/AD3 A11 O 61 P44/AD4 A9 O 62 P45/AD5 A8 O 63 P46/AD6 A13 O 64 P47/AD7 A15 O 65 P50/A8 | | 69 P54/A12 IO4 |O IO8 External RAM data Input/Output 70 P55/A13 IO1 O 45