ASRock B360M-ITX/ac User Manual - Page 54

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Page 54 highlights

tWRWR_dd Configure between module write to write delay. Round Trip Timing RTL Init Value Configure round trip latency init value for round trip latency training. IOL Init Value Configure IO latency init value for IO latency traning. RTL (CH A) Configure round trip latency for channel A. RTL (CH B) Configure round trip latency for channel B. IOL (CH A) Configure IO latency for channel A. IOL (CH B) Configure IO latency for channel B. IOL Offset (CH A) Configure IO latency offset for channel A. IOL Offset (CH B) Configure IO latency offset for channel B. RFR Delay (CH A) Configure RFR Delay for Channel A. RFR Delay (CH B) Configure RFR Delay for Channel B. ODT Setting ODT WR (A1) Configure the memory on die termination resistors' WR. ODT WR (B1) Configure the memory on die termination resistors' WR. 48 English

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48
English
tWRWR_dd
Configure between module write to write delay.
Round Trip Timing
RTL Init Value
Configure round trip latency init value for round trip latency training.
IOL Init Value
Configure IO latency init value for IO latency traning.
RTL (CH A)
Configure round trip latency for channel A.
RTL (CH B)
Configure round trip latency for channel B.
IOL (CH A)
Configure IO latency for channel A.
IOL (CH B)
Configure IO latency for channel B.
IOL
Offset (CH A)
Configure IO latency offset for channel A.
IOL
Offset (CH B)
Configure IO latency offset for channel B.
RFR Delay (CH A)
Configure RFR Delay for Channel A.
RFR Delay (CH B)
Configure RFR Delay for Channel B.
ODT Setting
ODT WR (A1)
Configure the memory on die termination resistors' WR.
ODT WR (B1)
Configure the memory on die termination resistors' WR.