ASRock B460 Pro4 User Manual - Page 64

RAS# Active Time tRAS, CPU Core Current Limit - xmp

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Short Duration Power Limit Configure Package Power Limit 2 in watts. When the limit is exceeded, the CPU ratio will be lowered immediately. A lower limit can protect the CPU and save power, while a higher limit may improve performance. CPU Core Current Limit Configure the current limit of the CPU core. A lower limit can protect the CPU and save power, while a higher limit may improve performance. GT Current Limit Configure the current limit of the GT slice. A lower limit can protect the CPU and save power, while a higher limit may improve performance. DRAM Configuration Memory Information Allows users to browse the serial presence detect (SPD) and Intel extreme memory profile (XMP) for DDR4 modules. DRAM Timing Configuration DRAM Frequency If [Auto] is selected, the motherboard will detect the memory module(s) inserted and assign the appropriate frequency automatically. Primary Timing CAS# Latency (tCL) The time between sending a column address to the memory and the beginning of the data in response. RAS# to CAS# Delay and Row Precharge (tRCDtRP) RAS# to CAS# Delay : The number of clock cycles required between the opening of a row of memory and accessing columns within it. Row Precharge: The number of clock cycles required between the issuing of the precharge command and opening the next row. RAS# Active Time (tRAS) The number of clock cycles required between a bank active command and issuing the precharge command. 58 English

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58
English
Short Duration Power Limit
Configure Package Power Limit 2 in watts. When the limit is exceeded, the CPU
ratio will be lowered immediately. A lower limit can protect the CPU and save
power, while a higher limit may improve performance.
CPU Core Current Limit
Configure the current limit of the CPU core. A lower limit can protect the CPU and
save power, while a higher limit may improve performance.
GT Current Limit
Configure the current limit of the GT slice. A lower limit can protect the CPU and
save power, while a higher limit may improve performance.
DRAM Configuration
Memory Information
Allows users to browse the serial presence detect (SPD) and Intel extreme memory profile
(XMP) for DDR4 modules.
DRAM Timing Configuration
DRAM Frequency
If [Auto] is selected, the motherboard will detect the memory module(s) inserted
and assign the appropriate frequency automatically.
Primary Timing
CAS# Latency (tCL)
°e time between sending a column address to the memory and the beginning of the data
in response.
RAS# to CAS# Delay and Row Precharge (tRCDtRP)
RAS# to CAS# Delay : °e number of clock cycles required between the opening of a row
of memory and accessing columns within it.
Row Precharge: °e number of clock cycles required between the issuing of the precharge
command and opening the next row.
RAS# Active Time (tRAS)
°e number of clock cycles required between a bank active command and issuing the
precharge command.