ASRock B460 Steel Legend User Manual - Page 67

Write to Read Delay tWTR_S

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B460 Steel Legend Write to Read Delay (tWTR_S) The number of clocks between the last valid write operation and the next read command to the same internal bank. Read to Precharge (tRTP) The number of clocks that are inserted between a read command to a row precharge command to the same rank. Four Activate Window (tFAW) The time window in which four activates are allowed the same rank. CAS Write Latency (tCWL) Configure CAS Write Latency. Third Timing tREFI Configure refresh cycles at an average periodic interval. tCKE Configure the period of time the DDR4 initiates a minimum of one refresh command internally once it enters Self-Refresh mode. Turn Around Timing tRDRD_sg Configure between module read to read delay. tRDRD_dg Configure between module read to read delay. tRDRD_dr Configure between module read to read delay. tRDRD_dd Configure between module read to read delay. tRDWR_sg Configure between module read to write delay. tRDWR_dg Configure between module read to write delay. 61 English

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English
61
B460 Steel Legend
Write to Read Delay (tWTR_S)
°e number of clocks between the last valid write operation and the next read command to
the same internal bank.
Read to Precharge (tRTP)
°e number of clocks that are inserted between a read command to a row pre-
charge command to the same rank.
Four Activate Window (tFAW)
°e time window in which four activates are allowed the same rank.
CAS Write Latency (tCWL)
Configure CAS Write Latency.
Third Timing
tREFI
Configure refresh cycles at an average periodic interval.
tCKE
Configure the period of time the DDR4 initiates a minimum of one refresh
command internally once it enters Self-Refresh mode.
Turn Around Timing
tRDRD_sg
Configure between module read to read delay.
tRDRD_dg
Configure between module read to read delay.
tRDRD_dr
Configure between module read to read delay.
tRDRD_dd
Configure between module read to read delay.
tRDWR_sg
Configure between module read to write delay.
tRDWR_dg
Configure between module read to write delay.