ASRock H370M Pro4 User Manual - Page 58

IO-L Offset CH

Page 58 highlights

RTL Init Value Configure round trip latency init value for round trip latency training. IO-L Init Value Configure IO latency init value for IO latency training. RTL (CH A) Configure round trip latency for channel A. RTL (CH B) Configure round trip latency for channel B. IO-L (CH A) Configure IO latency for channel A. IO-L (CH B) Configure IO latency for channel B. IO-L Offset (CH A) Configure IO latency offset for channel A. IO-L Offset (CH B) Configure IO latency offset for channel B. RFR Delay (CH A) Configure RFR Delay for Channel A. RFR Delay (CH B) Configure RFR Delay for Channel B. ODT Setting ODT WR (A1) Configure the memory on die termination resistors' WR for channel A1. ODT WR (A2) Configure the memory on die termination resistors' WR for channel A2. ODT WR (B1) Configure the memory on die termination resistors' WR for channel B1. H370M Pro4 53 English

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53
English
H370M Pro4
RTL Init Value
Configure round trip latency init value for round trip latency training.
IO-L Init Value
Configure IO latency init value for IO latency training.
RTL (CH A)
Configure round trip latency for channel A.
RTL (CH B)
Configure round trip latency for channel B.
IO-L (CH A)
Configure IO latency for channel A.
IO-L (CH B)
Configure IO latency for channel B.
IO-L Offset (CH A)
Configure IO latency offset for channel A.
IO-L Offset (CH B)
Configure IO latency offset for channel B.
RFR Delay (CH A)
Configure RFR Delay for Channel A.
RFR Delay (CH B)
Configure RFR Delay for Channel B.
ODT Setting
ODT WR (A1)
Configure the memory on die termination resistors' WR for channel A1.
ODT WR (A2)
Configure the memory on die termination resistors' WR for channel A2.
ODT WR (B1)
Configure the memory on die termination resistors' WR for channel B1.