ASRock H410M-HDV R2.0 User Manual - Page 51
CPU Core/Cache Voltage, Reset On Training Fail
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ODT PARK (B1) Configure the memory on die termination resistors' PARK for channel B1. Advanced Setting ASRock Timing Optimization Configure the fast path through the MRC. Realtime Memory Timing Configure the realtime memory timings. [Enabled] The system will allow performing realtime memory timing changes after MRC_DONE. Command Tristate Configure the Command Tristate Support. Exit On Failure Configure the Exit On Failure for MRC training steps. Reset On Training Fail Reset system if the MRC training fails. MRC Fast Boot Enable Memory Fast Boot to skip DRAM memory training for booting faster. Voltage Configuration CPU Core/Cache Voltage Input voltage for the processor by the external voltage refulator. GT Voltage Configure the voltage for the integrated GPU. VCCST Voltage Configure the voltage for the VCCST. PCH +1.0 Voltage Configure the chipset voltage. DRAM Voltage Use this to configure DRAM Voltage. The default value is [Auto]. 46 English