ASRock P43R1600Twins-110dB User Manual - Page 55

DRAM CH1 tRD Phase Adjust

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DRAM tRCD This controls the number of DRAM clocks for TRCD. Configuration options: Configuration options: [Auto], [3] to [10]. DRAM tWR This controls the number of DRAM clocks for TWR. Configuration options: Configuration options: [Auto], [3] to [15]. DRAM tRFC This controls the number of DRAM clocks for TRFC. Configuration options: Configuration options: [Auto], [15] to [78]. DRAM tWTR This controls the number of DRAM clocks for TWTR. Configuration options: Configuration options: [Auto], [2] to [15]. DRAM tRRD This controls the number of DRAM clocks for TRRD. Configuration options: Configuration options: [Auto], [2] to [15]. DRAM tRTP This controls the number of DRAM clocks for TRTP. Configuration options: Configuration options: [Auto], [2] to [15]. Advanced Memory Info : 18-18-9-9-0-0 DRAM CH0 RCOMP ODT This controls the number of DRAM clocks for CH0 RCOMP ODT. Configuration options: Configuration options: [Auto], [1] to [63]. DRAM CH1 RCOMP ODT This controls the number of DRAM clocks for CH1 RCOMP ODT. Configuration options: Configuration options: [Auto], [1] to [63]. DRAM CH0 tRD This controls the number of DRAM clocks for CH0 TRD. Configuration options: Configuration options: [Auto], [0] to [30]. DRAM CH1 tRD This controls the number of DRAM clocks for CH1 TRD. Configuration options: Configuration options: [Auto], [0] to [30]. DRAM CH0 tRD Phase Adjust This controls the number of DRAM clocks for CH0 TRD Phase Adjust. Configuration options: Configuration options: [Auto], [0] to [62]. DRAM CH1 tRD Phase Adjust This controls the number of DRAM clocks for CH1 TRD Phase Adjust. Configuration options: Configuration options: [Auto], [0] to [62]. 55

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DRAM tRCD
This controls the number of DRAM clocks for TRCD. Configuration options:
Configuration options: [Auto], [3] to [10].
DRAM tWR
This controls the number of DRAM clocks for TWR. Configuration options:
Configuration options: [Auto], [3] to [15].
DRAM tRFC
This controls the number of DRAM clocks for TRFC. Configuration options:
Configuration options: [Auto], [15] to [78].
DRAM tWTR
This controls the number of DRAM clocks for TWTR. Configuration options:
Configuration options: [Auto], [2] to [15].
DRAM tRRD
This controls the number of DRAM clocks for TRRD. Configuration options:
Configuration options: [Auto], [2] to [15].
DRAM tRTP
This controls the number of DRAM clocks for TRTP. Configuration options:
Configuration options: [Auto], [2] to [15].
Advanced Memory Info : 18-18-9-9-0-0
DRAM CH0 RCOMP ODT
This controls the number of DRAM clocks for CH0 RCOMP ODT.
Configuration options: Configuration options: [Auto], [1] to [63].
DRAM CH1 RCOMP ODT
This controls the number of DRAM clocks for CH1 RCOMP ODT.
Configuration options: Configuration options: [Auto], [1] to [63].
DRAM CH0 tRD
This controls the number of DRAM clocks for CH0 TRD. Configuration options:
Configuration options: [Auto], [0] to [30].
DRAM CH1 tRD
This controls the number of DRAM clocks for CH1 TRD. Configuration options:
Configuration options: [Auto], [0] to [30].
DRAM CH0 tRD Phase Adjust
This controls the number of DRAM clocks for CH0 TRD Phase Adjust.
Configuration options: Configuration options: [Auto], [0] to [62].
DRAM CH1 tRD Phase Adjust
This controls the number of DRAM clocks for CH1 TRD Phase Adjust.
Configuration options: Configuration options: [Auto], [0] to [62].