ASRock X299 Steel Legend User Manual - Page 79

IOL A2, IOL B1, IOL B2, IOL C1, IOL C2, IOL D1, IOL D2, ODT Setting, ODT WR A1, ODT WR A2, ODT WR B1

Page 79 highlights

X299 Steel Legend IOL (A2) Configure IO latency for channel A2. IOL (B1) Configure IO latency for channel B1. IOL (B2) Configure IO latency for channel B2. IOL (C1) Configure IO latency for channel B1. IOL (C2) Configure IO latency for channel B2. IOL (D1) Configure IO latency for channel D1. IOL (D2) Configure IO latency for channel B2. ODT Setting ODT WR (A1) Configure the memory on die termination resistors' WR for channel A1. ODT WR (A2) Configure the memory on die termination resistors' WR for channel A2. ODT WR (B1) Configure the memory on die termination resistors' WR for channel B1. ODT WR (B2) Configure the memory on die termination resistors' WR for channel B2. ODT WR (C1) Configure the memory on die termination resistors' WR for channel C1. ODT WR (C2) Configure the memory on die termination resistors' WR for channel C2. 73 English

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English
73
X299 Steel Legend
IOL (A2)
Configure IO latency for channel A2.
IOL (B1)
Configure IO latency for channel B1.
IOL (B2)
Configure IO latency for channel B2.
IOL (C1)
Configure IO latency for channel B1.
IOL (C2)
Configure IO latency for channel B2.
IOL (D1)
Configure IO latency for channel D1.
IOL (D2)
Configure IO latency for channel B2.
ODT Setting
ODT WR (A1)
Configure the memory on die termination resistors' WR for channel A1.
ODT WR (A2)
Configure the memory on die termination resistors' WR for channel A2.
ODT WR (B1)
Configure the memory on die termination resistors' WR for channel B1.
ODT WR (B2)
Configure the memory on die termination resistors' WR for channel B2.
ODT WR (C1)
Configure the memory on die termination resistors' WR for channel C1.
ODT WR (C2)
Configure the memory on die termination resistors' WR for channel C2.