ASRock Z390 Pro4 User Manual - Page 69

Clock Slew Rate, Control Slew Rate

Page 69 highlights

Z390 Pro4 Command Slew Rate Adjust Command Slew Rate for better signal. Default is 53 for IN. 89 for 2N. Control Slew Rate Adjust Control Slew Rate for better signal. Default is 53. Clock Slew Rate Adjust Clock Slew Rate for better signal. Default is 53. Dll Bandwidth 0 Configure Dll Bandwidth 0 (1067 MHz) to maximize the performance of intergrated memory controller. Dll Bandwidth 1 Configure Dll Bandwidth 1 (1333 MHz) to maximize the performance of intergrated memory controller. Dll Bandwidth 2 Configure Dll Bandwidth 2 (1600 MHz) to maximize the performance of intergrated memory controller. Dll Bandwidth 3 Configure Dll Bandwidth 3 (1867 MHz) to maximize the performance of intergrated memory controller. MRS Setting MRS TCL Configure the tCL for Memory MRS MR0. MRS tWRtRTP Configure the tWRtRTP for Memory MRS MR0. MRS tCWL Configure the tCWL for Memory MRS MR2. MRS tCCD_L Configure the tCL for Memory MRS MR6. 63 English

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Z390 Pro4
Command Slew Rate
Adjust Command Slew Rate for better signal. Default is 53 for IN. 89 for 2N.
Control Slew Rate
Adjust Control Slew Rate for better signal. Default is 53.
Clock Slew Rate
Adjust Clock Slew Rate for better signal. Default is 53.
Dll Bandwidth 0
Configure Dll Bandwidth 0 (1067 MHz) to maximize the performance of
intergrated memory controller.
Dll Bandwidth 1
Configure Dll Bandwidth 1 (1333 MHz) to maximize the performance of intergrated
memory controller.
Dll Bandwidth 2
Configure Dll Bandwidth 2 (1600 MHz) to maximize the performance of
intergrated memory controller.
Dll Bandwidth 3
Configure Dll Bandwidth 3 (1867 MHz) to maximize the performance of intergrated
memory controller.
MRS Setting
MRS TCL
Configure the tCL for Memory MRS MR0.
MRS tWRtRTP
Configure the tWRtRTP for Memory MRS MR0.
MRS tCWL
Configure the tCWL for Memory MRS MR2.
MRS tCCD_L
Configure the tCL for Memory MRS MR6.