ASRock Z690 Phantom Gaming-ITX/TB4 User Manual - Page 71

Initial RTL FIF0 Delay Offset

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Z690 Phantom Gaming-ITX/TB4 Initial RTL IO Delay Offset Configure round trip latency IO delay initial offset. Initial RTL FIF0 Delay Offset Configure round trip latency FIF0 delay initial offset. Initial RTL (MC0 C0 A1) Configure round trip latency initial value. Initial RTL (MC0 C1 A1) Configure round trip latency initial value. Initial RTL (MC1 C0 B1) Configure round trip latency initial value. Initial RTL (MC1 C1 B1) Configure round trip latency initial value. RTL (MC0 C0 A1) Configure round trip latency value. RTL (MC0 C1 A1) Configure round trip latency value. RTL (MC1 C0 B1) Configure round trip latency value. RTL (MC1 C1 B1) Configure round trip latency value. ODT Setting Dimm ODT Training ODT values will be optimized by Dimm On-Die Termination Training. ODT WR (A1) Configure the memory on die termination resistors' WR for channel A1. ODT WR (B1) Configure the memory on die termination resistors' WR for channel B1. ODT NOM Rd (A1) 63 English

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English
Z690 Phantom Gaming-ITX/TB4
Initial RTL IO Delay Offset
Configure round trip latency IO delay initial offset.
Initial RTL FIF0 Delay Offset
Configure round trip latency FIF0 delay initial offset.
Initial RTL (MC0 C0 A1)
Configure round trip latency initial value.
Initial RTL (MC0 C1 A1)
Configure round trip latency initial value.
Initial RTL (MC1 C0 B1)
Configure round trip latency initial value.
Initial RTL (MC1 C1 B1)
Configure round trip latency initial value.
RTL (MC0 C0 A1)
Configure round trip latency value.
RTL (MC0 C1 A1)
Configure round trip latency value.
RTL (MC1 C0 B1)
Configure round trip latency value.
RTL (MC1 C1 B1)
Configure round trip latency value.
ODT Setting
Dimm ODT Training
ODT values will be optimized by Dimm On-Die Termination Training.
ODT WR (A1)
Configure the memory on die termination resistors' WR for channel A1.
ODT WR (B1)
Configure the memory on die termination resistors' WR for channel B1.
ODT NOM Rd (A1)