Acer Aspire Z3170 Acer Aspire Z3170 and Z3171 Desktop Service Guide - Page 172

Checkpoints 0 A checkpoint is either a byte or word value output to I/O port 80h. The BIOS outputs checkpoints throughout boot-block and Power-On Self Test (POST) to indicate the task the system is currently executing. Checkpoint share very useful in aiding software developers or technicians in debugging problems that occur during the pre- boot process. Viewing BIOS checkpoints 0 Viewing all checkpoints generated by the BIOS requires a checkpoint card, also referred to as a POST card or POST diagnostic card. These are ISA or PCI add-in cards that show the value of I/O port 80h on a LED display. Checkpoints may appear on the bottom right corner of the screen during POST. This display method is limited, since it only displays checkpoints that occur after the video card has been activated. Bootblock Initialization Code Checkpoints 0 The Bootblock initialization code sets up the chipset, memory, and other components before system is available. The following table describes the type of checkpoints that may occur during the bootblock initialization portion of the BIOS. NOTE: NOTE: Please note that checkpoints may differ between different platforms based on system configuration. Checkpoints may change due to vendor requirements, system chipset or option ROMs from add-in PCI devices. SEC Status Codes 0 Table 4-2. Checkpoint 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C - 0x0D Not Used Description Power on. Reset type detection (soft/hard). AP initialization before microcode loading North Bridge initialization before microcode loading South Bridge initialization before microcode loading OEM initialization before microcode loading Microcode loading AP initialization after microcode loading North Bridge initialization after microcode loading South Bridge initialization after microcode loading OEM initialization after microcode loading Cache initialization Reserved for future AMI SEC error codes 4-6 Troubleshooting