Acer Veriton 1000 Aspire L350 & Veriton 1000 Service Guide - Page 41

Advanced Chipset Features Phoenix - Award BIOS CMOS Setup Utility Advanced Chipset Features System BIOS Cacheable Memory Hole at 15M-16M X PCI Express Root Port Func [Enabled] [Disable] [Press Enter] ** VGA Setting ** On-Chip Frame Buffer Size DVMT Mode DVMT/FIXED Memory Size [8MB] [DVMT] [256MB] Item Help Menu Level X KLIJ :Move Enter: Select +/-/PU/PD :Value F10:Save ESC:Exit F1:General Help F5:Previous Value F7:Default Settings Parameter System BIOS Cacheable Description Options Enabling this feature allows the caching of the motherboard BIOS ROM from F0000h to FFFFFh by the processor's Level 2 cache. This greatly speeds up accesses to the BIOS. Enabled Disabled However, this does not translate into better system performance because modern operating systems like Microsoft Windows XP do not need to communicate with the hardware via the BIOS. Current operating systems make use of drivers to access the hardware directly. Therefore, it would be a waste of the Level 2 cache's bandwidth if the motherboard BIOS was cached instead of data that are more critical to the system's performance. In addition, if any errant program writes into this memory area, it will result in a system crash. Therefore, it is highly recommended that you disable this feature for better system performance. Chapter 2 33