Acer Veriton 5200 Veriton 5200 Service Guide - Page 56

. Parameter Description APIC Mode Advanced Interrupt Controller. The I/O APIC handles interrupts very differently than the 8259. (Refer to ICH2 EDS Rev 1.0 P6-39, 6.8) MPS Version Control For OS Multi CPU for NT. system Options Enabled Disabled 1.4/ 1.1 Advanced Chipset Features Selecting "Advanced BIOS Features" from the Advanced Options menu displays the following screen. The following table describes the parameters found in the sub-menu. Settings in boldface are the default and suggested settings . Parameter Description Option DRAM Timing Selectable SDRAM Timing CAS Latency Time The default setting by your DRAM's SPD. Active to Precharge Delay The default setting by your DRAM's SPD. DRAM RAS #to CAS# Delay The default setting by your DRAM's SPD. DRAM RAS# Precharge The default setting by your DRAM's SPD. DRAM Data Integrity Mode The default setting by your DRAM's SPD. 1.5/2/2.5/3 7/6/5 3/2 3/2 Non-ECC/ECCl System BIOS Cacheable E.F segment shadow RAM cacheable. Enabled/Disabled Video BIOS Cacheable C segment shadow RAM cacheable. Enabled/Disabled Video RAM Cacheable A.B segment shadow RAM cacheable. Enabled/Disabled Delayed Transaction ICH2 enables delayed transactions for internal register, FWH, and LPC I/F accesses. Enabled/Disabled Delay Prior to Thermal Enables Pentium 4 thermal function - 16 miuntes 16/4/8/32 minutes after POST.(only for ACPI OS) 47 Chapter 2