Acer X223 X223W LCD Service Guide - Page 4

1. Product Specification (continued) ACER X223W 3 Go to cover page C o n n e c to r P in A ssig n m e n t D SU B P in 1 S ig n a l R e d -V id e o P in 6 2 G re e n -V id e o 7 3 B lu e -V id e o 8 4 NC 9 5 D D C -G N D 10 S ig n a l R ed -G N D G reen -G N D B lu e -G N D +5V S y n c-G N D P in 11 12 13 14 15 S ig n a l NC D D C -S D A H -S Y N C V -S Y N C D D C -S C L C o nne c to r P in D e sc riptio n D -S U B Pin D e s criptio n P in N ame D e s cription 1 R e d - V id e o R e d vid e o signa l inp ut. 2 G re e n- V id e o G re e n vid e o signa l inp ut. 3 B lue - V id e o B lue vid e o signa l inp ut. 4 GN D G ro und 5 DDC -GN D D D C gro und fo r the V E S A D D C 2 B i func tio n. 6 Red-GN D A na lo g signa l gro und fo r the R e d vid e o . 7 Green-GN D A na lo g signa l gro und fo r the G re e n vid e o . 8 B lue - G N D A na lo g signa l gro und fo r the B lue vid e o . 9 +5V + 5 V inp ut fro m ho st syste m fo r the V E S A D D C 2 B i func tio n. 10 S ync-G N D S igna l gro und 11 GN D G ro und 12 DDC_SDA S D A signa l inp ut fo r the V E S A D D C B 2 i func tio n. 13 H-SYN C H o rizo nta l signa l inp ut fro m the ho st syste m . 14 V-SYN C V e rtic a l signa l inp ut fro m the ho st syste m . 15 DDC-SCL S C L signa l inp ut fo r the V E S A D D C 2 B i func tio n. DVI-I / DVI-D (If using DVI-D cable, C1, C2, C3, C4, C5 is NC) Pin Signal Pin Signal 1 RX2- 11 GND 2 RX2+ 12 NC 3 GND 13 NC 4 NC 14 5V 5 NC 15 GND 6 SCL 16 HP 7 SCA 17 RX0- 8 Analog V-Sync (NC) 18 RX0+ 9 RX1- 19 GND 10 RX1+ 20 NC Pin Signal 21 NC 22 GND 23 RXC+ 24 RXC- C1 Analog Red (NC) C2 Analog Green (NC) C3 Analog Blue (NC) C4 Analog H-Sync (NC) C5 GND DVI-I / DVI-D ConnectorPinDescription Pin Name Description 1 RX2- TMDS link #0 channel#2 differentialpair 2 RX2+ TMDS link #0 channel#2 differentialpair 3 GND GNDfor no link share 4 NC NC 5 NC NC 6 SCL Clock line for DDC interface 7 SDA Data line for DDC interface 8 Analog V-sync for analoginterface V-Sync 9 RX1- TMDS link #0 channel#1 differentialpair 10 RX1+ TMDS link #0 channel#1 differentialpair 11 GND GNDfor no link share 12 NC NC 13 NC NC 14 5V +5Vinput fromhost systemfor DDC2Bfunction. 15 GND Ground(Usingas Detect Cable) Pin Name Description 16 HP Hot plugging 17 RX0- TMDS link #0 channel#0 differentialpair 18 RX0+ TMDS link #0 channel#0 differentialpair 19 GND GNDfor no link share 20 NC NC 21 NC NC 22 GND Clock shield 23 RXC+ TMDS clock differentialpair 24 RXCC1 Analog Red C2 Analog Green TMDS clock differentialpair AnalogRed signal Analog Green signal Analog C3 Blue AnalogBlue signal C4 Analog H-sync for analoginterface H-Sync C5 Analog AnalogGND GND 1.3.1.3 Audio Jack (option) This jack shall connect the audio input from host computer. 1.3.2 Video Input Signals Video Input Signal No. Symbol Item Min Normal Max Unit Remark 1 Fh Scanning Horizontal Frequency 30 81 kHz Minimum range 2 Fv Scanning Vertical Frequency 55 76 Hz Minimum range 3 Vih Hi Level Input 2.0 5.0 V Note 1) 4 Vil Low Level Input 0 0.8 V Note 1) 5 Video RGB Analog Video Level 0.0 0.7 1.0 V 75Ω to Ground Note 1) Schmitt-Triggers Input , Supported 3.3V device H(&V) sync output from PC. 1.3.2.1 Video Signal Amplitudes The three video inputs consist of Red ,Green , and Blue signals, each with its own coaxial cable terminated at the monitor. These video signals are analog levels, where 0 V corresponds to black , and 700 mV is the maximum signal amplitude for the respective color, when each signal is terminated by a nominal 75.0 ohms .For a given monitor luminance levels are measured using this defined video amplitud driving a monitor meeting the termination requirements .The signal amplitude is not to be readjusted to compensate for variations in termination impendance. 1.3.2.2 Video Signal Termination Impedance This analog video signal termination shall be 75Ω+/-1% which shall be resistive with a negligible reactive component . 1.3.2.3 Synchronization ( Sync ) Signals The Horizontal Sync (HS) TTL signal is used to initiate the display of a horizontal line. HS may be either active high or active low, depending upon the timing .The Vertical Sync (VS) TTL signal is used to initiate the display of a new frame .VS may be either active high or active low, depending on the timing 1.3.2.4 Sync Signal Levels The monitor must accept sync signals from both 3.3 and 5 volt TTL logic families.The inputs shall sense a logic 0 when the input is 0.8 volt or less and shall sense a logic 1 when the input is 2.0 volts or greater. In addition to these level requirements, there shall also be a minimum of 0.3 volt hysteresis provided for noise immunity (typically by using a Schmitt Trigger input ).That is , the input level at which the monitor actually detects a logic 0 shall be at least 0.3 volt lower than the level at which it actually detects a logic 1.If the monitor sync processing circuits are designed around the 3.3 volt logic family ,then the sync inputs must be 5 volt tolerant . 1.3.2.5 Sync Signal Loading TTL input loading shall be equivalent to one TTL input load. When logic 0 is asserted by a sync input , the maximum current source from any single monitor sync input to the driver is 1.6 mA .When logic 1 is asserted , the maximum current source from the driver to any single monitor sync input is 400 uA .